
Eugene Lee
Examiner (ID: 10398, Phone: (571)272-1733 , Office: P/2815 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815 |
| Total Applications | 1395 |
| Issued Applications | 1080 |
| Pending Applications | 107 |
| Abandoned Applications | 244 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18898686
[patent_doc_number] => 20240014171
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-11
[patent_title] => STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH SUBSTRATE HEAT SINKS AND ASSOCIATED SYSTEMS AND METHODS
[patent_app_type] => utility
[patent_app_number] => 18/372546
[patent_app_country] => US
[patent_app_date] => 2023-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4445
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18372546
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/372546 | Stacked semiconductor die assemblies with substrate heat sinks and associated systems and methods | Sep 24, 2023 | Issued |
Array
(
[id] => 19679414
[patent_doc_number] => 12191287
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-07
[patent_title] => Package structure
[patent_app_type] => utility
[patent_app_number] => 18/474168
[patent_app_country] => US
[patent_app_date] => 2023-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 30
[patent_no_of_words] => 9178
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18474168
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/474168 | Package structure | Sep 24, 2023 | Issued |
Array
(
[id] => 18866192
[patent_doc_number] => 20230420629
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => SEMICONDUCTOR LIGHT-EMITTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/459793
[patent_app_country] => US
[patent_app_date] => 2023-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1583
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459793
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/459793 | Semiconductor light-emitting device | Aug 31, 2023 | Issued |
Array
(
[id] => 19071113
[patent_doc_number] => 20240105539
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-28
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/459841
[patent_app_country] => US
[patent_app_date] => 2023-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12107
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459841
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/459841 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Aug 31, 2023 | Pending |
Array
(
[id] => 19071113
[patent_doc_number] => 20240105539
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-28
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/459841
[patent_app_country] => US
[patent_app_date] => 2023-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12107
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459841
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/459841 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Aug 31, 2023 | Pending |
Array
(
[id] => 19823269
[patent_doc_number] => 20250081476
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-06
[patent_title] => INTEGRATED CIRCUIT WITH INDUCTOR IN MAGNETIC PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/459230
[patent_app_country] => US
[patent_app_date] => 2023-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3330
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459230
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/459230 | INTEGRATED CIRCUIT WITH INDUCTOR IN MAGNETIC PACKAGE | Aug 30, 2023 | Pending |
Array
(
[id] => 19821208
[patent_doc_number] => 20250079415
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-06
[patent_title] => INTEGRATED CIRCUIT INCLUDING FLASH MEMORY AND CMOS LOGIC CIRCUITRY
[patent_app_type] => utility
[patent_app_number] => 18/458193
[patent_app_country] => US
[patent_app_date] => 2023-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13798
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -29
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458193
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/458193 | INTEGRATED CIRCUIT INCLUDING FLASH MEMORY AND CMOS LOGIC CIRCUITRY | Aug 29, 2023 | Pending |
Array
(
[id] => 19627116
[patent_doc_number] => 12165965
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-10
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/454413
[patent_app_country] => US
[patent_app_date] => 2023-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 8271
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18454413
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/454413 | Semiconductor device | Aug 22, 2023 | Issued |
Array
(
[id] => 19733759
[patent_doc_number] => 12211761
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-28
[patent_title] => Protector cap for package with thermal interface material
[patent_app_type] => utility
[patent_app_number] => 18/235104
[patent_app_country] => US
[patent_app_date] => 2023-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 42
[patent_no_of_words] => 12133
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18235104
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/235104 | Protector cap for package with thermal interface material | Aug 16, 2023 | Issued |
Array
(
[id] => 19460141
[patent_doc_number] => 12100648
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-24
[patent_title] => Electronic module, manufacturing method thereof and electronic package having the same
[patent_app_type] => utility
[patent_app_number] => 18/234695
[patent_app_country] => US
[patent_app_date] => 2023-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 16
[patent_no_of_words] => 5467
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234695
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/234695 | Electronic module, manufacturing method thereof and electronic package having the same | Aug 15, 2023 | Issued |
Array
(
[id] => 18814995
[patent_doc_number] => 20230389333
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => MOBILITY ENHANCEMENT BY SOURCE AND DRAIN STRESS LAYER OR IMPLANTATION IN THIN FILM TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 18/446755
[patent_app_country] => US
[patent_app_date] => 2023-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10078
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446755
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/446755 | Mobility enhancement by source and drain stress layer or implantation in thin film transistors | Aug 8, 2023 | Issued |
Array
(
[id] => 18812662
[patent_doc_number] => 20230386999
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE WITH BONDING STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/231254
[patent_app_country] => US
[patent_app_date] => 2023-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10771
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231254
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/231254 | METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE WITH BONDING STRUCTURE | Aug 7, 2023 | Pending |
Array
(
[id] => 19966804
[patent_doc_number] => 12336344
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-17
[patent_title] => Method of manufacturing light emitting device
[patent_app_type] => utility
[patent_app_number] => 18/446382
[patent_app_country] => US
[patent_app_date] => 2023-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 16
[patent_no_of_words] => 5002
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446382
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/446382 | Method of manufacturing light emitting device | Aug 7, 2023 | Issued |
Array
(
[id] => 18812662
[patent_doc_number] => 20230386999
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE WITH BONDING STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/231254
[patent_app_country] => US
[patent_app_date] => 2023-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10771
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231254
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/231254 | METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE WITH BONDING STRUCTURE | Aug 7, 2023 | Pending |
Array
(
[id] => 19698458
[patent_doc_number] => 20250017003
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-09
[patent_title] => METHOD FOR PHYSICALLY UNCLONABLE FUNCTION THROUGH GATE HEIGHT TUNING
[patent_app_type] => utility
[patent_app_number] => 18/230174
[patent_app_country] => US
[patent_app_date] => 2023-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4519
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18230174
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/230174 | METHOD FOR PHYSICALLY UNCLONABLE FUNCTION THROUGH GATE HEIGHT TUNING | Aug 3, 2023 | Pending |
Array
(
[id] => 19546424
[patent_doc_number] => 20240363460
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => PACKAGE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/364217
[patent_app_country] => US
[patent_app_date] => 2023-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5800
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364217
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/364217 | PACKAGE STRUCTURE | Aug 1, 2023 | Pending |
Array
(
[id] => 19524176
[patent_doc_number] => 12125917
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-22
[patent_title] => Thin film transistors having double gates
[patent_app_type] => utility
[patent_app_number] => 18/227233
[patent_app_country] => US
[patent_app_date] => 2023-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 11843
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227233
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/227233 | Thin film transistors having double gates | Jul 26, 2023 | Issued |
Array
(
[id] => 20119614
[patent_doc_number] => 12369352
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-22
[patent_title] => Thin film transfer using substrate with etch stop layer and diffusion barrier layer
[patent_app_type] => utility
[patent_app_number] => 18/357471
[patent_app_country] => US
[patent_app_date] => 2023-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 75
[patent_figures_cnt] => 101
[patent_no_of_words] => 13250
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357471
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/357471 | Thin film transfer using substrate with etch stop layer and diffusion barrier layer | Jul 23, 2023 | Issued |
Array
(
[id] => 19321658
[patent_doc_number] => 20240243205
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-18
[patent_title] => SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/347770
[patent_app_country] => US
[patent_app_date] => 2023-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8463
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18347770
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/347770 | SEMICONDUCTOR DEVICES | Jul 5, 2023 | Pending |
Array
(
[id] => 19321658
[patent_doc_number] => 20240243205
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-18
[patent_title] => SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/347770
[patent_app_country] => US
[patent_app_date] => 2023-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8463
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18347770
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/347770 | SEMICONDUCTOR DEVICES | Jul 5, 2023 | Pending |