
Eugene Lee
Examiner (ID: 1659, Phone: (571)272-1733 , Office: P/2815 )
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2815 |
| Total Applications | 1444 |
| Issued Applications | 1100 |
| Pending Applications | 119 |
| Abandoned Applications | 248 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19421073
[patent_doc_number] => 20240297197
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-05
[patent_title] => SEMICONDUCTOR DEVICE, SOLID-STATE IMAGING DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/700127
[patent_app_country] => US
[patent_app_date] => 2022-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15757
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -27
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18700127
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/700127 | SEMICONDUCTOR DEVICE, SOLID-STATE IMAGING DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | Aug 24, 2022 | Pending |
Array
(
[id] => 19881284
[patent_doc_number] => 20250113541
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-03
[patent_title] => OXIDE THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREFOR, AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/291389
[patent_app_country] => US
[patent_app_date] => 2022-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11595
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18291389
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/291389 | OXIDE THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREFOR, AND ELECTRONIC DEVICE | Aug 23, 2022 | Pending |
Array
(
[id] => 18221891
[patent_doc_number] => 20230060885
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-02
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/893543
[patent_app_country] => US
[patent_app_date] => 2022-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20800
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17893543
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/893543 | Semiconductor device | Aug 22, 2022 | Issued |
Array
(
[id] => 18696373
[patent_doc_number] => 20230326811
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-12
[patent_title] => SEMICONDUCTOR LAYOUT STRUCTURE AND SEMICONDUCTOR TEST STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/817222
[patent_app_country] => US
[patent_app_date] => 2022-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8354
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17817222
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/817222 | Semiconductor layout structure and semiconductor test structure | Aug 2, 2022 | Issued |
Array
(
[id] => 20963054
[patent_doc_number] => 12733513
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-09-08
[patent_title] => Jump-fusing and tailored PCB system for loop inductance reduction
[patent_app_type] => utility
[patent_app_number] => 17/880057
[patent_app_country] => US
[patent_app_date] => 2022-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 1182
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880057
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/880057 | JUMP-FUSING AND TAILORED PCB SYSTEM FOR LOOP INDUCTANCE REDUCTION | Aug 2, 2022 | Pending |
Array
(
[id] => 18009269
[patent_doc_number] => 20220368036
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => STRUCTURE FOR RADIO FREQUENCY APPLICATIONS
[patent_app_type] => utility
[patent_app_number] => 17/816599
[patent_app_country] => US
[patent_app_date] => 2022-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4757
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17816599
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/816599 | Structure for radio frequency applications | Jul 31, 2022 | Issued |
Array
(
[id] => 17993760
[patent_doc_number] => 20220359797
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-10
[patent_title] => WAVELENGTH CONVERSION COMPONENT
[patent_app_type] => utility
[patent_app_number] => 17/873124
[patent_app_country] => US
[patent_app_date] => 2022-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5628
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873124
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/873124 | Wavelength conversion component | Jul 24, 2022 | Issued |
Array
(
[id] => 18008847
[patent_doc_number] => 20220367614
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => AVALANCHE-PROTECTED TRANSISTORS USING A BOTTOM BREAKDOWN CURRENT PATH AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/867843
[patent_app_country] => US
[patent_app_date] => 2022-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13458
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17867843
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/867843 | Avalanche-protected transistors using a bottom breakdown current path and methods of forming the same | Jul 18, 2022 | Issued |
Array
(
[id] => 19837631
[patent_doc_number] => 20250089417
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-13
[patent_title] => DISPLAY APPARATUS, DISPLAY PANEL AND METHOD OF PREPARING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/560482
[patent_app_country] => US
[patent_app_date] => 2022-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7247
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18560482
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/560482 | DISPLAY APPARATUS, DISPLAY PANEL AND METHOD OF PREPARING THE SAME | Jul 18, 2022 | Pending |
Array
(
[id] => 17985970
[patent_doc_number] => 20220352007
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => Method For Manufacturing Body-Source-Tied SOI Transistor
[patent_app_type] => utility
[patent_app_number] => 17/863925
[patent_app_country] => US
[patent_app_date] => 2022-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5232
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17863925
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/863925 | Method for manufacturing body-source-tied SOI transistor | Jul 12, 2022 | Issued |
Array
(
[id] => 17949290
[patent_doc_number] => 20220336309
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-20
[patent_title] => SEMICONDUCTOR PACKAGE, INTEGRATED OPTICAL COMMUNICATION SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/857166
[patent_app_country] => US
[patent_app_date] => 2022-07-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10775
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857166
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/857166 | Semiconductor package, integrated optical communication system | Jul 3, 2022 | Issued |
Array
(
[id] => 17949396
[patent_doc_number] => 20220336415
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-20
[patent_title] => GRID-BASED INTERCONNECT SYSTEM FOR MODULAR INTEGRATED CIRCUIT SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 17/856193
[patent_app_country] => US
[patent_app_date] => 2022-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9921
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856193
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/856193 | GRID-BASED INTERCONNECT SYSTEM FOR MODULAR INTEGRATED CIRCUIT SYSTEMS | Jun 30, 2022 | Pending |
Array
(
[id] => 17933609
[patent_doc_number] => 20220328735
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => LIGHT EMITTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/852327
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9502
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852327
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/852327 | Light emitting device | Jun 27, 2022 | Issued |
Array
(
[id] => 18757500
[patent_doc_number] => 20230360962
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => SOI Structures with Carbon in Body Regions for Improved RF-SOI Switches
[patent_app_type] => utility
[patent_app_number] => 17/847006
[patent_app_country] => US
[patent_app_date] => 2022-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9281
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847006
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/847006 | SOI structures with carbon in body regions for improved RF-SOI switches | Jun 21, 2022 | Issued |
Array
(
[id] => 17917612
[patent_doc_number] => 20220320008
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-06
[patent_title] => MODULE
[patent_app_type] => utility
[patent_app_number] => 17/807930
[patent_app_country] => US
[patent_app_date] => 2022-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6790
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807930
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/807930 | MODULE | Jun 20, 2022 | Abandoned |
Array
(
[id] => 18849043
[patent_doc_number] => 20230411447
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-21
[patent_title] => SEMICONDUCTOR DEVICE COMPRISING A LATERAL SUPER JUNCTION FIELD EFFECT TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 17/845715
[patent_app_country] => US
[patent_app_date] => 2022-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1464
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845715
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/845715 | SEMICONDUCTOR DEVICE COMPRISING A LATERAL SUPER JUNCTION FIELD EFFECT TRANSISTOR | Jun 20, 2022 | Abandoned |
Array
(
[id] => 19444539
[patent_doc_number] => 12094830
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-17
[patent_title] => Integrated fan-out (InFO) package structure
[patent_app_type] => utility
[patent_app_number] => 17/840636
[patent_app_country] => US
[patent_app_date] => 2022-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 20
[patent_no_of_words] => 5713
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840636
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/840636 | Integrated fan-out (InFO) package structure | Jun 14, 2022 | Issued |
Array
(
[id] => 19349405
[patent_doc_number] => 20240258369
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-01
[patent_title] => SUPER JUNCTION SEMICONDUCTOR POWER DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/019083
[patent_app_country] => US
[patent_app_date] => 2022-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1602
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18019083
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/019083 | Super junction semiconductor power device | Jun 13, 2022 | Issued |
Array
(
[id] => 18439908
[patent_doc_number] => 20230187203
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => SEMICONDUCTOR DEVICE MANUFACTURING METHOD, SEMICONDUCTOR MEMORY DEVICE MANUFACTURING METHOD, SEMICONDUCTOR MEMORY DEVICE, AND SUBSTRATE TREATMENT APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/806282
[patent_app_country] => US
[patent_app_date] => 2022-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10516
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806282
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/806282 | Semiconductor device manufacturing method, semiconductor memory device manufacturing method, semiconductor memory device, and substrate treatment apparatus | Jun 9, 2022 | Issued |
Array
(
[id] => 20216186
[patent_doc_number] => 12412840
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-09
[patent_title] => Power module with multi-layer substrate and second insulation layer to increase power density
[patent_app_type] => utility
[patent_app_number] => 17/830291
[patent_app_country] => US
[patent_app_date] => 2022-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 0
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830291
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/830291 | Power module with multi-layer substrate and second insulation layer to increase power density | May 31, 2022 | Issued |