Search

Eva Y. Montalvo

Supervisory Patent Examiner (ID: 18787, Phone: (571)270-3829 , Office: P/2817 )

Most Active Art Unit
2814
Art Unit(s)
2814, 4158, 2817, 2899, 2800, 2818
Total Applications
368
Issued Applications
274
Pending Applications
16
Abandoned Applications
82

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5250656 [patent_doc_number] => 20070132112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'Semiconductor device and mold for resin-molding semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/599258 [patent_app_country] => US [patent_app_date] => 2006-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4262 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20070132112.pdf [firstpage_image] =>[orig_patent_app_number] => 11599258 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/599258
Semiconductor device and mold for resin-molding semiconductor device Nov 14, 2006 Issued
Array ( [id] => 7811624 [patent_doc_number] => 08134156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-13 [patent_title] => 'Semiconductor device including zinc oxide containing semiconductor film' [patent_app_type] => utility [patent_app_number] => 11/598669 [patent_app_country] => US [patent_app_date] => 2006-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 45 [patent_no_of_words] => 14564 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/134/08134156.pdf [firstpage_image] =>[orig_patent_app_number] => 11598669 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/598669
Semiconductor device including zinc oxide containing semiconductor film Nov 13, 2006 Issued
Array ( [id] => 4477158 [patent_doc_number] => 07868407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Substrate comprising a lower silicone resin film and an upper silicone resin film' [patent_app_type] => utility [patent_app_number] => 11/598749 [patent_app_country] => US [patent_app_date] => 2006-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 14843 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/868/07868407.pdf [firstpage_image] =>[orig_patent_app_number] => 11598749 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/598749
Substrate comprising a lower silicone resin film and an upper silicone resin film Nov 13, 2006 Issued
Array ( [id] => 5093001 [patent_doc_number] => 20070114610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-24 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/599218 [patent_app_country] => US [patent_app_date] => 2006-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3688 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20070114610.pdf [firstpage_image] =>[orig_patent_app_number] => 11599218 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/599218
Semiconductor device and method of fabricating the same Nov 12, 2006 Abandoned
Array ( [id] => 4901821 [patent_doc_number] => 20080111233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-15 [patent_title] => 'Semiconductor package with embedded die' [patent_app_type] => utility [patent_app_number] => 11/595638 [patent_app_country] => US [patent_app_date] => 2006-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5395 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20080111233.pdf [firstpage_image] =>[orig_patent_app_number] => 11595638 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/595638
Semiconductor package with embedded die Nov 9, 2006 Issued
Array ( [id] => 5215845 [patent_doc_number] => 20070104926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-10 [patent_title] => 'Circuit device in particular frequency converter' [patent_app_type] => utility [patent_app_number] => 11/595088 [patent_app_country] => US [patent_app_date] => 2006-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1452 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20070104926.pdf [firstpage_image] =>[orig_patent_app_number] => 11595088 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/595088
Circuit device in particular frequency converter Nov 8, 2006 Abandoned
Array ( [id] => 5031556 [patent_doc_number] => 20070096095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Test pattern for semiconductor device and method for measuring pattern shift' [patent_app_type] => utility [patent_app_number] => 11/589959 [patent_app_country] => US [patent_app_date] => 2006-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2636 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20070096095.pdf [firstpage_image] =>[orig_patent_app_number] => 11589959 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/589959
Test pattern for semiconductor device and method for measuring pattern shift Oct 30, 2006 Abandoned
Array ( [id] => 4890693 [patent_doc_number] => 20080099790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'LAYOUT STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/553788 [patent_app_country] => US [patent_app_date] => 2006-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3757 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20080099790.pdf [firstpage_image] =>[orig_patent_app_number] => 11553788 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/553788
Layout structure having a fill element arranged at an angle to a conducting line Oct 26, 2006 Issued
Array ( [id] => 5031753 [patent_doc_number] => 20070096292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Electronic-part built-in substrate and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 11/586628 [patent_app_country] => US [patent_app_date] => 2006-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8115 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20070096292.pdf [firstpage_image] =>[orig_patent_app_number] => 11586628 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/586628
Electronic-part built-in substrate and manufacturing method therefor Oct 25, 2006 Abandoned
Array ( [id] => 5208242 [patent_doc_number] => 20070246826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Wafer level semiconductor module and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/585088 [patent_app_country] => US [patent_app_date] => 2006-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4803 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20070246826.pdf [firstpage_image] =>[orig_patent_app_number] => 11585088 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/585088
Wafer level semiconductor module and method for manufacturing the same Oct 23, 2006 Abandoned
Array ( [id] => 5082972 [patent_doc_number] => 20070273023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'Integrated circuit package having exposed thermally conducting body' [patent_app_type] => utility [patent_app_number] => 11/583718 [patent_app_country] => US [patent_app_date] => 2006-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7926 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20070273023.pdf [firstpage_image] =>[orig_patent_app_number] => 11583718 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/583718
Integrated circuit package having exposed thermally conducting body Oct 19, 2006 Abandoned
Array ( [id] => 4913150 [patent_doc_number] => 20080093749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'Partial Solder Mask Defined Pad Design' [patent_app_type] => utility [patent_app_number] => 11/551508 [patent_app_country] => US [patent_app_date] => 2006-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6754 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20080093749.pdf [firstpage_image] =>[orig_patent_app_number] => 11551508 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/551508
Partial Solder Mask Defined Pad Design Oct 19, 2006 Abandoned
Array ( [id] => 5031616 [patent_doc_number] => 20070096155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Cell structure for a semiconductor memory device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/581359 [patent_app_country] => US [patent_app_date] => 2006-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8104 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20070096155.pdf [firstpage_image] =>[orig_patent_app_number] => 11581359 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/581359
Cell structure for a semiconductor memory device and method of fabricating the same Oct 16, 2006 Abandoned
Array ( [id] => 121346 [patent_doc_number] => 07709292 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'Processes and packaging for high voltage integrated circuits, electronic devices, and circuits' [patent_app_type] => utility [patent_app_number] => 11/541429 [patent_app_country] => US [patent_app_date] => 2006-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 41 [patent_no_of_words] => 8483 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/709/07709292.pdf [firstpage_image] =>[orig_patent_app_number] => 11541429 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/541429
Processes and packaging for high voltage integrated circuits, electronic devices, and circuits Sep 28, 2006 Issued
Array ( [id] => 591440 [patent_doc_number] => 07439611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-21 [patent_title] => 'Circuit board with auxiliary wiring configuration to suppress breakage during bonding process' [patent_app_type] => utility [patent_app_number] => 11/534288 [patent_app_country] => US [patent_app_date] => 2006-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3425 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/439/07439611.pdf [firstpage_image] =>[orig_patent_app_number] => 11534288 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/534288
Circuit board with auxiliary wiring configuration to suppress breakage during bonding process Sep 21, 2006 Issued
Array ( [id] => 4817024 [patent_doc_number] => 20080224283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'Leadframe-based semiconductor package and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 11/523719 [patent_app_country] => US [patent_app_date] => 2006-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4195 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20080224283.pdf [firstpage_image] =>[orig_patent_app_number] => 11523719 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/523719
Leadframe-based semiconductor package and fabrication method thereof Sep 19, 2006 Abandoned
Array ( [id] => 4985896 [patent_doc_number] => 20070152234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'LIGHT EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 11/533149 [patent_app_country] => US [patent_app_date] => 2006-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11641 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20070152234.pdf [firstpage_image] =>[orig_patent_app_number] => 11533149 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/533149
Light emitting device with filled tetrahedral (FT) semiconductor in the active layer Sep 18, 2006 Issued
Array ( [id] => 7593310 [patent_doc_number] => 07651890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-26 [patent_title] => 'Method and apparatus for prevention of solder corrosion' [patent_app_type] => utility [patent_app_number] => 11/532329 [patent_app_country] => US [patent_app_date] => 2006-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1930 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/651/07651890.pdf [firstpage_image] =>[orig_patent_app_number] => 11532329 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/532329
Method and apparatus for prevention of solder corrosion Sep 14, 2006 Issued
Array ( [id] => 4634325 [patent_doc_number] => 08012774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'Coating process for a light-emitting diode (LED)' [patent_app_type] => utility [patent_app_number] => 11/530128 [patent_app_country] => US [patent_app_date] => 2006-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3826 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/012/08012774.pdf [firstpage_image] =>[orig_patent_app_number] => 11530128 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/530128
Coating process for a light-emitting diode (LED) Sep 7, 2006 Issued
Array ( [id] => 5152127 [patent_doc_number] => 20070035009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Printed circuit board, semiconductor package and multi-stack semiconductor package using the same' [patent_app_type] => utility [patent_app_number] => 11/502399 [patent_app_country] => US [patent_app_date] => 2006-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4911 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20070035009.pdf [firstpage_image] =>[orig_patent_app_number] => 11502399 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/502399
Printed circuit board, semiconductor package and multi-stack semiconductor package using the same Aug 10, 2006 Abandoned
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