
Evan Garrett Clinton
Examiner (ID: 713, Phone: (571)270-0525 , Office: P/2816 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2899, 2816 |
| Total Applications | 663 |
| Issued Applications | 542 |
| Pending Applications | 74 |
| Abandoned Applications | 65 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14191471
[patent_doc_number] => 20190115441
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-18
[patent_title] => REDUCED CAPACITANCE COUPLING EFFECTS IN DEVICES
[patent_app_type] => utility
[patent_app_number] => 15/730745
[patent_app_country] => US
[patent_app_date] => 2017-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8971
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15730745
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/730745 | Reduced capacitance coupling effects in devices | Oct 11, 2017 | Issued |
Array
(
[id] => 16226382
[patent_doc_number] => 20200251499
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-06
[patent_title] => Display Panel and Method for Manufacturing Thereof
[patent_app_type] => utility
[patent_app_number] => 15/767302
[patent_app_country] => US
[patent_app_date] => 2017-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6827
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15767302
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/767302 | Display Panel and Method for Manufacturing Thereof | Sep 26, 2017 | Abandoned |
Array
(
[id] => 12916924
[patent_doc_number] => 20180197484
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-12
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/713685
[patent_app_country] => US
[patent_app_date] => 2017-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18712
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15713685
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/713685 | Display device | Sep 23, 2017 | Issued |
Array
(
[id] => 17587097
[patent_doc_number] => 11325343
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-10
[patent_title] => Ion-doped two-dimensional nanomaterials
[patent_app_type] => utility
[patent_app_number] => 16/484024
[patent_app_country] => US
[patent_app_date] => 2017-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 5295
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16484024
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/484024 | Ion-doped two-dimensional nanomaterials | Sep 10, 2017 | Issued |
Array
(
[id] => 15475477
[patent_doc_number] => 10553624
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-02-04
[patent_title] => Manufacturing method of array substrate, array substrate and display apparatus
[patent_app_type] => utility
[patent_app_number] => 15/762292
[patent_app_country] => US
[patent_app_date] => 2017-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 33
[patent_no_of_words] => 9803
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15762292
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/762292 | Manufacturing method of array substrate, array substrate and display apparatus | Sep 7, 2017 | Issued |
Array
(
[id] => 13283531
[patent_doc_number] => 10153357
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-12-11
[patent_title] => Superjunction power semiconductor device and method for forming
[patent_app_type] => utility
[patent_app_number] => 15/687881
[patent_app_country] => US
[patent_app_date] => 2017-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 21
[patent_no_of_words] => 5353
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687881
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/687881 | Superjunction power semiconductor device and method for forming | Aug 27, 2017 | Issued |
Array
(
[id] => 14064203
[patent_doc_number] => 10236408
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-03-19
[patent_title] => Method for manufacturing semiconductor device
[patent_app_type] => utility
[patent_app_number] => 15/687855
[patent_app_country] => US
[patent_app_date] => 2017-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 56
[patent_figures_cnt] => 138
[patent_no_of_words] => 51603
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687855
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/687855 | Method for manufacturing semiconductor device | Aug 27, 2017 | Issued |
Array
(
[id] => 13769755
[patent_doc_number] => 10177227
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-01-08
[patent_title] => Method for fabricating junctions and spacers for horizontal gate all around devices
[patent_app_type] => utility
[patent_app_number] => 15/687747
[patent_app_country] => US
[patent_app_date] => 2017-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 26
[patent_no_of_words] => 9486
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687747
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/687747 | Method for fabricating junctions and spacers for horizontal gate all around devices | Aug 27, 2017 | Issued |
Array
(
[id] => 13145677
[patent_doc_number] => 10090177
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-10-02
[patent_title] => Cold fluid semiconductor device release during pick and place operations, and associated systems and methods
[patent_app_type] => utility
[patent_app_number] => 15/687015
[patent_app_country] => US
[patent_app_date] => 2017-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6285
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687015
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/687015 | Cold fluid semiconductor device release during pick and place operations, and associated systems and methods | Aug 24, 2017 | Issued |
Array
(
[id] => 12917773
[patent_doc_number] => 20180197767
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-12
[patent_title] => TRANSFER APPARATUS AND TRANSFER METHOD
[patent_app_type] => utility
[patent_app_number] => 15/686360
[patent_app_country] => US
[patent_app_date] => 2017-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7885
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686360
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/686360 | Transfer apparatus and transfer method | Aug 24, 2017 | Issued |
Array
(
[id] => 13976557
[patent_doc_number] => 10217643
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-26
[patent_title] => Method of processing target object
[patent_app_type] => utility
[patent_app_number] => 15/686285
[patent_app_country] => US
[patent_app_date] => 2017-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 11800
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686285
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/686285 | Method of processing target object | Aug 24, 2017 | Issued |
Array
(
[id] => 12778582
[patent_doc_number] => 20180151362
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-31
[patent_title] => METHOD OF FORMING PATTERNS FOR SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/686578
[patent_app_country] => US
[patent_app_date] => 2017-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7108
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686578
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/686578 | Method of forming patterns for semiconductor device | Aug 24, 2017 | Issued |
Array
(
[id] => 13109405
[patent_doc_number] => 10073347
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-09-11
[patent_title] => Semiconductor method of protecting wafer from bevel contamination
[patent_app_type] => utility
[patent_app_number] => 15/685908
[patent_app_country] => US
[patent_app_date] => 2017-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 6312
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15685908
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/685908 | Semiconductor method of protecting wafer from bevel contamination | Aug 23, 2017 | Issued |
Array
(
[id] => 13009293
[patent_doc_number] => 10028336
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-17
[patent_title] => Semiconductor manufacturing method and semiconductor manufacturing apparatus
[patent_app_type] => utility
[patent_app_number] => 15/679911
[patent_app_country] => US
[patent_app_date] => 2017-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 12745
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15679911
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/679911 | Semiconductor manufacturing method and semiconductor manufacturing apparatus | Aug 16, 2017 | Issued |
Array
(
[id] => 16207007
[patent_doc_number] => 20200239997
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-30
[patent_title] => EVAPORATION MASK PLATE, MANUFACTURING METHOD THEREOF AND EVAPORATION METHOD
[patent_app_type] => utility
[patent_app_number] => 15/751467
[patent_app_country] => US
[patent_app_date] => 2017-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4036
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15751467
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/751467 | Evaporation mask plate, manufacturing method thereof and evaporation method | Aug 2, 2017 | Issued |
Array
(
[id] => 12779017
[patent_doc_number] => 20180151507
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-31
[patent_title] => Alignment Pattern for Package Singulation
[patent_app_type] => utility
[patent_app_number] => 15/640975
[patent_app_country] => US
[patent_app_date] => 2017-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10771
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640975
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/640975 | Alignment pattern for package singulation | Jul 2, 2017 | Issued |
Array
(
[id] => 12160671
[patent_doc_number] => 20180031937
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-01
[patent_title] => 'ELECTRO-OPTIC APPARATUS AND ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/640950
[patent_app_country] => US
[patent_app_date] => 2017-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 11413
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640950
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/640950 | Electro-optic apparatus and electronic device | Jul 2, 2017 | Issued |
Array
(
[id] => 12375663
[patent_doc_number] => 09960115
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-05-01
[patent_title] => Heat dissipation and series resistance reduction of PA and RF switch in SLT by backside thick metal
[patent_app_type] => utility
[patent_app_number] => 15/640928
[patent_app_country] => US
[patent_app_date] => 2017-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2843
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640928
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/640928 | Heat dissipation and series resistance reduction of PA and RF switch in SLT by backside thick metal | Jul 2, 2017 | Issued |
Array
(
[id] => 12129396
[patent_doc_number] => 20180012982
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-11
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/640825
[patent_app_country] => US
[patent_app_date] => 2017-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8485
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640825
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/640825 | Insulated gate bipolar transistor and diode | Jul 2, 2017 | Issued |
Array
(
[id] => 14332931
[patent_doc_number] => 10297494
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-05-21
[patent_title] => Raised via for terminal connections on different planes
[patent_app_type] => utility
[patent_app_number] => 15/640949
[patent_app_country] => US
[patent_app_date] => 2017-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 34
[patent_no_of_words] => 6131
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640949
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/640949 | Raised via for terminal connections on different planes | Jul 2, 2017 | Issued |