
Evren Seven
Examiner (ID: 608, Phone: (571)270-5666 , Office: P/2812 )
| Most Active Art Unit | 2812 |
| Art Unit(s) | 2812 |
| Total Applications | 1114 |
| Issued Applications | 823 |
| Pending Applications | 121 |
| Abandoned Applications | 202 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11432367
[patent_doc_number] => 09570694
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-14
[patent_title] => 'All printed and transparent CNT TFT'
[patent_app_type] => utility
[patent_app_number] => 14/763791
[patent_app_country] => US
[patent_app_date] => 2014-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2185
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14763791
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/763791 | All printed and transparent CNT TFT | Jan 26, 2014 | Issued |
Array
(
[id] => 9491175
[patent_doc_number] => 20140141581
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-22
[patent_title] => 'METHOD OF MANUFACTURING GRAPHENE NANOMESH AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/164694
[patent_app_country] => US
[patent_app_date] => 2014-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5277
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14164694
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/164694 | Method of manufacturing graphene nanomesh and method of manufacturing semiconductor device | Jan 26, 2014 | Issued |
Array
(
[id] => 10479379
[patent_doc_number] => 20150364396
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/764198
[patent_app_country] => US
[patent_app_date] => 2014-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 11106
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14764198
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/764198 | Display device | Jan 23, 2014 | Issued |
Array
(
[id] => 10479317
[patent_doc_number] => 20150364335
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'METHODS FOR PROVIDING SPACED LITHOGRAPHY FEATURES ON A SUBSTRATE BY SELF-ASSEMBLY OF BLOCK COPOLYMERS'
[patent_app_type] => utility
[patent_app_number] => 14/764133
[patent_app_country] => US
[patent_app_date] => 2014-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7170
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14764133
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/764133 | Methods for providing spaced lithography features on a substrate by self-assembly of block copolymers | Jan 23, 2014 | Issued |
Array
(
[id] => 9477319
[patent_doc_number] => 20140134782
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-15
[patent_title] => 'ULTRAVIOLET SENSOR AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/157768
[patent_app_country] => US
[patent_app_date] => 2014-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 12010
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14157768
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/157768 | ULTRAVIOLET SENSOR AND METHOD FOR MANUFACTURING THE SAME | Jan 16, 2014 | Abandoned |
Array
(
[id] => 10440442
[patent_doc_number] => 20150325454
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-12
[patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/762699
[patent_app_country] => US
[patent_app_date] => 2014-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5789
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14762699
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/762699 | Method for manufacturing semiconductor device | Jan 16, 2014 | Issued |
Array
(
[id] => 9488353
[patent_doc_number] => 20140138759
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-22
[patent_title] => 'INTEGRATED CIRCUIT DEVICE HAVING A RESISTOR AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/149884
[patent_app_country] => US
[patent_app_date] => 2014-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 13785
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14149884
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/149884 | INTEGRATED CIRCUIT DEVICE HAVING A RESISTOR AND METHOD OF MANUFACTURING THE SAME | Jan 7, 2014 | Abandoned |
Array
(
[id] => 10795076
[patent_doc_number] => 20160141233
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-19
[patent_title] => 'FIRST-PACKAGED AND LATER-ETCHED NORMAL CHIP THREE DIMENSION SYSTEM-IN-PACKAGE METAL CIRCUIT BOARD STRUCTURE AND PROCESSING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/901411
[patent_app_country] => US
[patent_app_date] => 2014-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 12214
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14901411
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/901411 | FIRST-PACKAGED AND LATER-ETCHED NORMAL CHIP THREE DIMENSION SYSTEM-IN-PACKAGE METAL CIRCUIT BOARD STRUCTURE AND PROCESSING METHOD THEREOF | Jan 6, 2014 | Abandoned |
Array
(
[id] => 10079749
[patent_doc_number] => 09117601
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-25
[patent_title] => 'System and method for integrating a single nanowire into a nanocircuit'
[patent_app_type] => utility
[patent_app_number] => 14/141133
[patent_app_country] => US
[patent_app_date] => 2013-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 5431
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141133
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/141133 | System and method for integrating a single nanowire into a nanocircuit | Dec 25, 2013 | Issued |
Array
(
[id] => 9421863
[patent_doc_number] => 20140106514
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-17
[patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD FOR GROWING GRAPHENE'
[patent_app_type] => utility
[patent_app_number] => 14/140432
[patent_app_country] => US
[patent_app_date] => 2013-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 7331
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14140432
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/140432 | Method for manufacturing semiconductor device and method for growing graphene | Dec 23, 2013 | Issued |
Array
(
[id] => 11346514
[patent_doc_number] => 09530930
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-12-27
[patent_title] => 'Method of fabricating semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 14/762842
[patent_app_country] => US
[patent_app_date] => 2013-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 23
[patent_no_of_words] => 5595
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14762842
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/762842 | Method of fabricating semiconductor devices | Dec 18, 2013 | Issued |
Array
(
[id] => 10802704
[patent_doc_number] => 20160148861
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-26
[patent_title] => 'FIRST-PACKAGED AND LATER-ETCHED THREE-DIMENSIONAL FLIP-CHIP SYSTEM-IN-PACKAGE STRUCTURE AND PROCESSING METHOD THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 14/901526
[patent_app_country] => US
[patent_app_date] => 2013-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 12308
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14901526
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/901526 | FIRST-PACKAGED AND LATER-ETCHED THREE-DIMENSIONAL FLIP-CHIP SYSTEM-IN-PACKAGE STRUCTURE AND PROCESSING METHOD THEREFOR | Dec 18, 2013 | Abandoned |
Array
(
[id] => 9421910
[patent_doc_number] => 20140106561
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-17
[patent_title] => 'Graphene Barrier Layers for Interconnects and Methods for Forming the Same'
[patent_app_type] => utility
[patent_app_number] => 14/134219
[patent_app_country] => US
[patent_app_date] => 2013-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8183
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14134219
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/134219 | Graphene barrier layers for interconnects and methods for forming the same | Dec 18, 2013 | Issued |
Array
(
[id] => 10817460
[patent_doc_number] => 20160163622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-09
[patent_title] => 'PACKAGING-BEFORE-ETCHING FLIP CHIP 3D SYSTEM-LEVEL METAL CIRCUIT BOARD STRUCTURE AND TECHNIQUE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/901547
[patent_app_country] => US
[patent_app_date] => 2013-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 12115
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14901547
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/901547 | PACKAGING-BEFORE-ETCHING FLIP CHIP 3D SYSTEM-LEVEL METAL CIRCUIT BOARD STRUCTURE AND TECHNIQUE THEREOF | Dec 2, 2013 | Abandoned |
Array
(
[id] => 10431203
[patent_doc_number] => 20150316215
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-05
[patent_title] => 'LED MODULE'
[patent_app_type] => utility
[patent_app_number] => 14/649103
[patent_app_country] => US
[patent_app_date] => 2013-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8400
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14649103
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/649103 | LED module | Nov 28, 2013 | Issued |
Array
(
[id] => 9875137
[patent_doc_number] => 08962404
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-02-24
[patent_title] => 'Method for manufacturing fan-out lines on array substrate'
[patent_app_type] => utility
[patent_app_number] => 14/077770
[patent_app_country] => US
[patent_app_date] => 2013-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 4331
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 286
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14077770
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/077770 | Method for manufacturing fan-out lines on array substrate | Nov 11, 2013 | Issued |
Array
(
[id] => 9477300
[patent_doc_number] => 20140134763
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-15
[patent_title] => 'METHOD OF CUTTING FLEXIBLE DISPLAY DEVICE AND METHOD OF FABRICATING FLEXIBLE DISPLAY DEVICE USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/077884
[patent_app_country] => US
[patent_app_date] => 2013-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 6411
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14077884
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/077884 | Method of cutting flexible display device and method of fabricating flexible display device using the same | Nov 11, 2013 | Issued |
Array
(
[id] => 10042130
[patent_doc_number] => 09082844
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-07-14
[patent_title] => 'Methods of transferring semiconductor elements and manufacturing semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 14/077956
[patent_app_country] => US
[patent_app_date] => 2013-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 6178
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14077956
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/077956 | Methods of transferring semiconductor elements and manufacturing semiconductor devices | Nov 11, 2013 | Issued |
Array
(
[id] => 9474199
[patent_doc_number] => 20140131661
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-15
[patent_title] => 'GRAPHENE FIELD EFFECT TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 14/076714
[patent_app_country] => US
[patent_app_date] => 2013-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5676
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14076714
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/076714 | Graphene field effect transistor | Nov 10, 2013 | Issued |
Array
(
[id] => 10953963
[patent_doc_number] => 20140356984
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-04
[patent_title] => 'SOLID STATE SOURCE INTRODUCTION OF DOPANTS AND ADDITIVES FOR A PLASMA DOPING PROCESS'
[patent_app_type] => utility
[patent_app_number] => 14/075453
[patent_app_country] => US
[patent_app_date] => 2013-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7776
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14075453
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/075453 | Solid state source introduction of dopants and additives for a plasma doping process | Nov 7, 2013 | Issued |