Evren Seven

Array ( [id] => 2679762 [patent_doc_number] => 05047976 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'Logic circuit having carry select adders' [patent_app_type] => 1 [patent_app_number] => 7/658467 [patent_app_country] => US [patent_app_date] => 1991-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 48 [patent_no_of_words] => 13852 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 642 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/047/05047976.pdf [firstpage_image] =>[orig_patent_app_number] => 658467 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2769938 [patent_doc_number] => 05060183 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-22 [patent_title] => 'Parallel multiplier circuit using matrices, including half and full adders' [patent_app_type] => 1 [patent_app_number] => 7/655229 [patent_app_country] => US [patent_app_date] => 1991-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2270 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/060/05060183.pdf [firstpage_image] =>[orig_patent_app_number] => 655229 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2815281 [patent_doc_number] => 05148381 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-15 [patent_title] => 'One-dimensional interpolation circuit and method based on modification of a parallel multiplier' [patent_app_type] => 1 [patent_app_number] => 7/651738 [patent_app_country] => US [patent_app_date] => 1991-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4550 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/148/05148381.pdf [firstpage_image] =>[orig_patent_app_number] => 651738 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2813884 [patent_doc_number] => 05115408 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-19 [patent_title] => 'High speed multiplier' [patent_app_type] => 1 [patent_app_number] => 7/652241 [patent_app_country] => US [patent_app_date] => 1991-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2682 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/115/05115408.pdf [firstpage_image] =>[orig_patent_app_number] => 652241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2796838 [patent_doc_number] => 05155697 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-13 [patent_title] => 'Most precise fraction display method' [patent_app_type] => 1 [patent_app_number] => 7/648120 [patent_app_country] => US [patent_app_date] => 1991-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2499 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/155/05155697.pdf [firstpage_image] =>[orig_patent_app_number] => 648120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2840384 [patent_doc_number] => 05128887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-07 [patent_title] => 'Numerical accuracy indicator for rounded numeric value display method' [patent_app_type] => 1 [patent_app_number] => 7/648669 [patent_app_country] => US [patent_app_date] => 1991-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1959 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/128/05128887.pdf [firstpage_image] =>[orig_patent_app_number] => 648669 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2905184 [patent_doc_number] => 05184317 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-02 [patent_title] => 'Method and apparatus for generating mathematical functions' [patent_app_type] => 1 [patent_app_number] => 7/623238 [patent_app_country] => US [patent_app_date] => 1991-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 27448 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/184/05184317.pdf [firstpage_image] =>[orig_patent_app_number] => 623238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2840420 [patent_doc_number] => 05175700 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-29 [patent_title] => 'Method and apparatus for solving multiple equations' [patent_app_type] => 1 [patent_app_number] => 7/645953 [patent_app_country] => US [patent_app_date] => 1991-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 3450 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/175/05175700.pdf [firstpage_image] =>[orig_patent_app_number] => 645953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2918422 [patent_doc_number] => 05216627 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-01 [patent_title] => 'Method and apparatus for computing with terms having units' [patent_app_type] => 1 [patent_app_number] => 7/645860 [patent_app_country] => US [patent_app_date] => 1991-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 6034 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/216/05216627.pdf [firstpage_image] =>[orig_patent_app_number] => 645860 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2880546 [patent_doc_number] => 05163018 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-10 [patent_title] => 'Digital signal processing circuit for carrying out a convolution computation using circulating coefficients' [patent_app_type] => 1 [patent_app_number] => 7/644250 [patent_app_country] => US [patent_app_date] => 1991-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 24 [patent_no_of_words] => 10939 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/163/05163018.pdf [firstpage_image] =>[orig_patent_app_number] => 644250 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2865279 [patent_doc_number] => 05084834 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-28 [patent_title] => 'Digit-serial linear combining apparatus' [patent_app_type] => 1 [patent_app_number] => 7/644187 [patent_app_country] => US [patent_app_date] => 1991-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8906 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 596 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/084/05084834.pdf [firstpage_image] =>[orig_patent_app_number] => 644187 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2879903 [patent_doc_number] => 05153849 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-06 [patent_title] => 'Multiplier having an optimum arrangement of anding circuits and adding circuits' [patent_app_type] => 1 [patent_app_number] => 7/634230 [patent_app_country] => US [patent_app_date] => 1991-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 7476 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 560 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/153/05153849.pdf [firstpage_image] =>[orig_patent_app_number] => 634230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2931270 [patent_doc_number] => 05235535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-10 [patent_title] => 'Arithmetic operation apparatus for elementary function' [patent_app_type] => 1 [patent_app_number] => 7/638779 [patent_app_country] => US [patent_app_date] => 1991-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4176 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/235/05235535.pdf [firstpage_image] =>[orig_patent_app_number] => 638779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2797072 [patent_doc_number] => 05130940 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-14 [patent_title] => 'Barrel shifter for data shifting' [patent_app_type] => 1 [patent_app_number] => 7/637689 [patent_app_country] => US [patent_app_date] => 1991-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5603 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/130/05130940.pdf [firstpage_image] =>[orig_patent_app_number] => 637689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2955779 [patent_doc_number] => 05181185 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-19 [patent_title] => 'Parallel multiplier using skip array and modified wallace tree' [patent_app_type] => 1 [patent_app_number] => 7/638449 [patent_app_country] => US [patent_app_date] => 1991-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3818 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/181/05181185.pdf [firstpage_image] =>[orig_patent_app_number] => 638449 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2797053 [patent_doc_number] => 05130939 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-14 [patent_title] => 'Compact electronic calculator capable of displaying matrix element data under actual matrix form' [patent_app_type] => 1 [patent_app_number] => 7/629489 [patent_app_country] => US [patent_app_date] => 1990-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3910 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/130/05130939.pdf [firstpage_image] =>[orig_patent_app_number] => 629489 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2814156 [patent_doc_number] => 05146423 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Circuit arrangement for adding or subtracting operands coded in BCD-code or binary-code' [patent_app_type] => 1 [patent_app_number] => 7/613889 [patent_app_country] => US [patent_app_date] => 1990-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3618 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146423.pdf [firstpage_image] =>[orig_patent_app_number] => 613889 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2797090 [patent_doc_number] => 05130941 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-14 [patent_title] => 'Dynamic barrel shifter' [patent_app_type] => 1 [patent_app_number] => 7/622969 [patent_app_country] => US [patent_app_date] => 1990-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4903 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/130/05130941.pdf [firstpage_image] =>[orig_patent_app_number] => 622969 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2888925 [patent_doc_number] => 05119325 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'Multiplier having a reduced number of partial product calculations' [patent_app_type] => 1 [patent_app_number] => 7/622029 [patent_app_country] => US [patent_app_date] => 1990-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4418 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119325.pdf [firstpage_image] =>[orig_patent_app_number] => 622029 [rel_patent_id] =>[rel_patent_doc_number] =>)