Search

Faisal M. Zaman

Examiner (ID: 4014, Phone: (571)272-6495 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2111, 2175, 2186, 2185, 2112
Total Applications
1096
Issued Applications
691
Pending Applications
85
Abandoned Applications
334

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20461071 [patent_doc_number] => 20260010499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-08 [patent_title] => EXCEPTION HANDLING SYSTEM AND METHOD, AND DETECTION DEVICE FOR SPACE ENVIRONMENT [patent_app_type] => utility [patent_app_number] => 19/122756 [patent_app_country] => US [patent_app_date] => 2025-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19122756 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/122756
Exception handling system and method, and detection device for space environment Jan 23, 2025 Issued
Array ( [id] => 20123038 [patent_doc_number] => 20250238069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => POWER CONSERVING CLOCK CIRCUIT WITH FAST START-UP [patent_app_type] => utility [patent_app_number] => 19/025909 [patent_app_country] => US [patent_app_date] => 2025-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19025909 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/025909
POWER CONSERVING CLOCK CIRCUIT WITH FAST START-UP Jan 15, 2025 Pending
Array ( [id] => 20061755 [patent_doc_number] => 20250199977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => Translating Between CXL.mem and CXL.cache Write Transactions [patent_app_type] => utility [patent_app_number] => 19/017421 [patent_app_country] => US [patent_app_date] => 2025-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 70073 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19017421 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/017421
Translating between CXL.mem and CXL.cache write transactions Jan 10, 2025 Issued
Array ( [id] => 20827950 [patent_doc_number] => 12681516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-14 [patent_title] => Power management techniques using location-mapped chiplet configuration [patent_app_type] => utility [patent_app_number] => 18/981154 [patent_app_country] => US [patent_app_date] => 2024-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 11130 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18981154 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/981154
Power management techniques using location-mapped chiplet configuration Dec 12, 2024 Issued
Array ( [id] => 20043138 [patent_doc_number] => 20250181360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => USING CUSTOM TEMPLATES TO DEFINE NEW SYSTEM TYPES FOR INSTANTIATION [patent_app_type] => utility [patent_app_number] => 18/936889 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2340 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936889 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936889
USING CUSTOM TEMPLATES TO DEFINE NEW SYSTEM TYPES FOR INSTANTIATION Nov 3, 2024 Pending
Array ( [id] => 20652994 [patent_doc_number] => 20260105013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-16 [patent_title] => TRANSIENT STATE MANAGEMENT OF AN INPUT/OUTPUT IMPACTED STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/914582 [patent_app_country] => US [patent_app_date] => 2024-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2204 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18914582 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/914582
TRANSIENT STATE MANAGEMENT OF AN INPUT/OUTPUT IMPACTED STORAGE DEVICE Oct 13, 2024 Pending
Array ( [id] => 19893835 [patent_doc_number] => 20250119147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => CIRCUIT SYSTEM [patent_app_type] => utility [patent_app_number] => 18/904537 [patent_app_country] => US [patent_app_date] => 2024-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18904537 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/904537
CIRCUIT SYSTEM Oct 1, 2024 Pending
Array ( [id] => 19711372 [patent_doc_number] => 20250021514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => SERIAL BUS REPEATER WITH LOW POWER STATE DETECTION [patent_app_type] => utility [patent_app_number] => 18/903010 [patent_app_country] => US [patent_app_date] => 2024-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18903010 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/903010
SERIAL BUS REPEATER WITH LOW POWER STATE DETECTION Sep 30, 2024 Pending
Array ( [id] => 20629529 [patent_doc_number] => 20260093816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-02 [patent_title] => Mutable Code Efficiencies in Measured Secure Boot for Hardware Root of Trust [patent_app_type] => utility [patent_app_number] => 18/902530 [patent_app_country] => US [patent_app_date] => 2024-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5784 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18902530 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/902530
Mutable Code Efficiencies in Measured Secure Boot for Hardware Root of Trust Sep 29, 2024 Pending
Array ( [id] => 20166469 [patent_doc_number] => 20250258516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => Hardware Timer Manager Supporting Multiple Precision Levels [patent_app_type] => utility [patent_app_number] => 18/902329 [patent_app_country] => US [patent_app_date] => 2024-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2746 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18902329 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/902329
Hardware Timer Manager Supporting Multiple Precision Levels Sep 29, 2024 Pending
Array ( [id] => 20512917 [patent_doc_number] => 20260037018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => PERFORMANCE CONTROL METHOD AND SYSTEM [patent_app_type] => utility [patent_app_number] => 18/902083 [patent_app_country] => US [patent_app_date] => 2024-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18902083 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/902083
PERFORMANCE CONTROL METHOD AND SYSTEM Sep 29, 2024 Pending
Array ( [id] => 19864332 [patent_doc_number] => 20250103118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => COMMUNICATION SYSTEM, ELECTRONIC CONTROL DEVICE AND MANAGEMENT DEVICE [patent_app_type] => utility [patent_app_number] => 18/895451 [patent_app_country] => US [patent_app_date] => 2024-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12896 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18895451 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/895451
COMMUNICATION SYSTEM, ELECTRONIC CONTROL DEVICE AND MANAGEMENT DEVICE Sep 24, 2024 Pending
Array ( [id] => 19864329 [patent_doc_number] => 20250103115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => COMMUNICATION SYSTEM AND POWER SUPPLY SWITCHING DEVICE [patent_app_type] => utility [patent_app_number] => 18/895461 [patent_app_country] => US [patent_app_date] => 2024-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18895461 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/895461
COMMUNICATION SYSTEM AND POWER SUPPLY SWITCHING DEVICE Sep 24, 2024 Pending
Array ( [id] => 20601549 [patent_doc_number] => 20260079558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-19 [patent_title] => LOGIC RETENTION SUPPORT IN A DATA PROCESSING SYSTEM [patent_app_type] => utility [patent_app_number] => 18/888415 [patent_app_country] => US [patent_app_date] => 2024-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4091 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18888415 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/888415
LOGIC RETENTION SUPPORT IN A DATA PROCESSING SYSTEM Sep 17, 2024 Pending
Array ( [id] => 20601544 [patent_doc_number] => 20260079553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-19 [patent_title] => Bond-to-Bond Die Interface [patent_app_type] => utility [patent_app_number] => 18/887819 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18887819 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/887819
Bond-to-Bond Die Interface Sep 16, 2024 Pending
Array ( [id] => 20222734 [patent_doc_number] => 20250285665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => MEMORY DEVICE, AN OPERATING METHOD OF THE MEMORY DEVICE, AND A MEMORY MODULE INCLUDING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/830733 [patent_app_country] => US [patent_app_date] => 2024-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9762 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18830733 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/830733
MEMORY DEVICE, AN OPERATING METHOD OF THE MEMORY DEVICE, AND A MEMORY MODULE INCLUDING THE MEMORY DEVICE Sep 10, 2024 Pending
Array ( [id] => 20351471 [patent_doc_number] => 20250348323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => CONTROLLER AND STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/823685 [patent_app_country] => US [patent_app_date] => 2024-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3397 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18823685 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/823685
CONTROLLER AND STORAGE DEVICE Sep 3, 2024 Pending
Array ( [id] => 20311729 [patent_doc_number] => 20250329358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => WRITE TRAINING CIRCUIT, SEMICONDUCTOR DEVICE, AND DATA PROCESSING SYSTEM INCLUDING WRITE TRAINING CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/823324 [patent_app_country] => US [patent_app_date] => 2024-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18823324 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/823324
WRITE TRAINING CIRCUIT, SEMICONDUCTOR DEVICE, AND DATA PROCESSING SYSTEM INCLUDING WRITE TRAINING CIRCUIT Sep 2, 2024 Pending
Array ( [id] => 20866809 [patent_doc_number] => 12693701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-28 [patent_title] => Synchronization method and client [patent_app_type] => utility [patent_app_number] => 18/812207 [patent_app_country] => US [patent_app_date] => 2024-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1543 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 399 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18812207 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/812207
SYNCHRONIZATION METHOD AND CLIENT Aug 21, 2024 Pending
Array ( [id] => 20427680 [patent_doc_number] => 20250389770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-25 [patent_title] => SYSTEM AND METHOD FOR AREA-EFFICIENT MONITORING OF CLOCK SIGNALS [patent_app_type] => utility [patent_app_number] => 18/809400 [patent_app_country] => US [patent_app_date] => 2024-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4618 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18809400 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/809400
SYSTEM AND METHOD FOR AREA-EFFICIENT MONITORING OF CLOCK SIGNALS Aug 19, 2024 Pending
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