Search

Faisal M. Zaman

Examiner (ID: 9538, Phone: (571)272-6495 , Office: P/2185 )

Most Active Art Unit
2111
Art Unit(s)
2185, 2175, 2112, 2111, 2186
Total Applications
1077
Issued Applications
682
Pending Applications
82
Abandoned Applications
332

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17024229 [patent_doc_number] => 20210248100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => SWITCH PRUNING IN A SWITCH FABRIC BUS CHASSIS [patent_app_type] => utility [patent_app_number] => 17/241394 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7695 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17241394 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/241394
Switch pruning in a switch fabric bus chassis Apr 26, 2021 Issued
Array ( [id] => 17961888 [patent_doc_number] => 20220342469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => POWER BUDGET PROFILES OF COMPUTING DEVICES [patent_app_type] => utility [patent_app_number] => 17/239531 [patent_app_country] => US [patent_app_date] => 2021-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2630 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17239531 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/239531
POWER BUDGET PROFILES OF COMPUTING DEVICES Apr 22, 2021 Abandoned
Array ( [id] => 18453881 [patent_doc_number] => 20230195161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => SYNCHRONIZATION SYSTEM AND SYNCHRONIZATION METHOD OF CLOCK [patent_app_type] => utility [patent_app_number] => 17/919039 [patent_app_country] => US [patent_app_date] => 2021-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7657 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17919039 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/919039
Synchronization system and synchronization method of clock Apr 13, 2021 Issued
Array ( [id] => 18136240 [patent_doc_number] => 11561919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Memory controller, method of operating memory controller and storage device [patent_app_type] => utility [patent_app_number] => 17/220986 [patent_app_country] => US [patent_app_date] => 2021-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10590 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220986 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220986
Memory controller, method of operating memory controller and storage device Apr 1, 2021 Issued
Array ( [id] => 16964954 [patent_doc_number] => 20210216453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => SYSTEMS AND METHODS FOR INPUT/OUTPUT COMPUTING RESOURCE CONTROL [patent_app_type] => utility [patent_app_number] => 17/216462 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10107 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17216462 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/216462
SYSTEMS AND METHODS FOR INPUT/OUTPUT COMPUTING RESOURCE CONTROL Mar 28, 2021 Abandoned
Array ( [id] => 19369430 [patent_doc_number] => 12061510 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Transition into and out of a partially-off power state [patent_app_type] => utility [patent_app_number] => 17/193222 [patent_app_country] => US [patent_app_date] => 2021-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3240 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17193222 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/193222
Transition into and out of a partially-off power state Mar 4, 2021 Issued
Array ( [id] => 17544930 [patent_doc_number] => 11310073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Methods and arrangements for arranging data communication between electronic devices in a transportation means [patent_app_type] => utility [patent_app_number] => 17/186304 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6881 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17186304 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/186304
Methods and arrangements for arranging data communication between electronic devices in a transportation means Feb 25, 2021 Issued
Array ( [id] => 17907616 [patent_doc_number] => 11461471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Virtual reality for security augmentation in home and office environments [patent_app_type] => utility [patent_app_number] => 17/175273 [patent_app_country] => US [patent_app_date] => 2021-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13271 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17175273 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/175273
Virtual reality for security augmentation in home and office environments Feb 11, 2021 Issued
Array ( [id] => 18294721 [patent_doc_number] => 20230104407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => VOLTAGE-CURRENT PROFILE BASED START-UP OF PoE DEVICES [patent_app_type] => utility [patent_app_number] => 17/795923 [patent_app_country] => US [patent_app_date] => 2021-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17795923 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/795923
Voltage-current profile based start-up of PoE devices Feb 7, 2021 Issued
Array ( [id] => 18198868 [patent_doc_number] => 20230052387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => TRANSCEIVER DEVICE AND COMMUNICATION CONTROL DEVICE FOR A USER STATION OF A SERIAL BUS SYSTEM, AND METHOD FOR COMMUNICATING IN A SERIAL BUS SYSTEM [patent_app_type] => utility [patent_app_number] => 17/789069 [patent_app_country] => US [patent_app_date] => 2021-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17789069 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/789069
Transceiver device and communication control device for a user station of a serial bus system, and method for communicating in a serial bus system Jan 17, 2021 Issued
Array ( [id] => 17316634 [patent_doc_number] => 20210405683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => CLOCK CONVERTING CIRCUIT WITH SYMMETRIC STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/145211 [patent_app_country] => US [patent_app_date] => 2021-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16877 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17145211 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/145211
Clock converting circuit with symmetric structure Jan 7, 2021 Issued
Array ( [id] => 16934410 [patent_doc_number] => 20210200299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => MANAGING REDUCED POWER MEMORY OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/136891 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16181 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136891 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/136891
Managing reduced power memory operations Dec 28, 2020 Issued
Array ( [id] => 18911716 [patent_doc_number] => 11874694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Semiconductor device and semiconductor device system [patent_app_type] => utility [patent_app_number] => 17/791634 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 13078 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17791634 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/791634
Semiconductor device and semiconductor device system Dec 28, 2020 Issued
Array ( [id] => 16934821 [patent_doc_number] => 20210200710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => PROCESSOR FOR CONFIGURABLE PARALLEL COMPUTATIONS [patent_app_type] => utility [patent_app_number] => 17/132437 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17132437 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/132437
Processor for configurable parallel computations Dec 22, 2020 Issued
Array ( [id] => 17690550 [patent_doc_number] => 20220197843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => SYSTEMS AND METHODS FOR SINGLE-WIRE MULTI-PROTOCOL DISCOVERY AND ASSIGNMENT TO PROTOCOL-AWARE PURPOSE-BUILT ENGINES [patent_app_type] => utility [patent_app_number] => 17/131300 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131300 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131300
Systems and methods for single-wire multi-protocol discovery and assignment to protocol-aware purpose-built engines Dec 21, 2020 Issued
Array ( [id] => 18194838 [patent_doc_number] => 20230048357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => COMMUNICATING SYSTEM COMPRISING A REMOVABLE DEVICE AND A DOCKING DEVICE [patent_app_type] => utility [patent_app_number] => 17/788139 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3061 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17788139 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/788139
COMMUNICATING SYSTEM COMPRISING A REMOVABLE DEVICE AND A DOCKING DEVICE Dec 20, 2020 Abandoned
Array ( [id] => 19137301 [patent_doc_number] => 11972266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Hibernating and resuming nodes of a computing cluster [patent_app_type] => utility [patent_app_number] => 17/086393 [patent_app_country] => US [patent_app_date] => 2020-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 14630 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17086393 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/086393
Hibernating and resuming nodes of a computing cluster Oct 30, 2020 Issued
Array ( [id] => 18561703 [patent_doc_number] => 11726947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Interface device and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/081595 [patent_app_country] => US [patent_app_date] => 2020-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 34 [patent_no_of_words] => 15950 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17081595 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/081595
Interface device and method of operating the same Oct 26, 2020 Issued
Array ( [id] => 16623281 [patent_doc_number] => 20210041934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => POWER SAVINGS FOR NEURAL NETWORK ARCHITECTURE WITH ZERO ACTIVATIONS DURING INFERENCE [patent_app_type] => utility [patent_app_number] => 17/080395 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17080395 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/080395
POWER SAVINGS FOR NEURAL NETWORK ARCHITECTURE WITH ZERO ACTIVATIONS DURING INFERENCE Oct 25, 2020 Abandoned
Array ( [id] => 17549917 [patent_doc_number] => 20220121259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => SYSTEMS AND METHODS FOR FLEXIBLE MOTHERBOARD SUPPORTING FLEXIBLE PROCESSOR UTILIZATION FOR OPTIMIZED DESIGN [patent_app_type] => utility [patent_app_number] => 17/076720 [patent_app_country] => US [patent_app_date] => 2020-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9992 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17076720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/076720
Systems and methods for flexible motherboard supporting flexible processor utilization for optimized design Oct 20, 2020 Issued
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