Search

Fan Ng

Examiner (ID: 6451, Phone: (571)270-3690 , Office: P/2416 )

Most Active Art Unit
2471
Art Unit(s)
4145, 2471, 2416
Total Applications
595
Issued Applications
524
Pending Applications
0
Abandoned Applications
75

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15312833 [patent_doc_number] => 10521120 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-31 [patent_title] => Intelligently mapping virtual blocks to physical blocks in a storage system [patent_app_type] => utility [patent_app_number] => 16/142575 [patent_app_country] => US [patent_app_date] => 2018-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16142575 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/142575
Intelligently mapping virtual blocks to physical blocks in a storage system Sep 25, 2018 Issued
Array ( [id] => 17408796 [patent_doc_number] => 11249677 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Method and apparatus for erasing or writing flash data [patent_app_type] => utility [patent_app_number] => 16/128486 [patent_app_country] => US [patent_app_date] => 2018-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2781 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16128486 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/128486
Method and apparatus for erasing or writing flash data Sep 10, 2018 Issued
Array ( [id] => 15622859 [patent_doc_number] => 20200081834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => SET AWARE SYSTEM DATA AND MAPPING TABLES [patent_app_type] => utility [patent_app_number] => 16/127891 [patent_app_country] => US [patent_app_date] => 2018-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16127891 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/127891
Set aware system data and mapping tables Sep 10, 2018 Issued
Array ( [id] => 13782345 [patent_doc_number] => 20190004711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => ADDRESSING USAGE OF SHARED SSD RESOURCES IN VOLATILE AND UNPREDICTABLE OPERATING ENVIRONMENTS [patent_app_type] => utility [patent_app_number] => 16/122402 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122402 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122402
Addressing usage of shared SSD resources in volatile and unpredictable operating environments Sep 4, 2018 Issued
Array ( [id] => 15313283 [patent_doc_number] => 10521346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-31 [patent_title] => Arithmetic processing apparatus and control method for arithmetic processing apparatus [patent_app_type] => utility [patent_app_number] => 16/120484 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6482 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16120484 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/120484
Arithmetic processing apparatus and control method for arithmetic processing apparatus Sep 3, 2018 Issued
Array ( [id] => 15577815 [patent_doc_number] => 10579286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Memory device and reclaiming method of the memory device [patent_app_type] => utility [patent_app_number] => 16/120832 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 8451 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16120832 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/120832
Memory device and reclaiming method of the memory device Sep 3, 2018 Issued
Array ( [id] => 15284709 [patent_doc_number] => 10515019 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-24 [patent_title] => Updating aging information using second-level address translation for virtual address-backed virtual machines [patent_app_type] => utility [patent_app_number] => 16/121488 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10719 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121488 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121488
Updating aging information using second-level address translation for virtual address-backed virtual machines Sep 3, 2018 Issued
Array ( [id] => 17031357 [patent_doc_number] => 11093168 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Processing of neural networks on electronic devices [patent_app_type] => utility [patent_app_number] => 16/120682 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14165 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 610 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16120682 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/120682
Processing of neural networks on electronic devices Sep 3, 2018 Issued
Array ( [id] => 15563833 [patent_doc_number] => 20200066328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => System and Method for Performing Per-Bank Memory Refresh [patent_app_type] => utility [patent_app_number] => 16/109720 [patent_app_country] => US [patent_app_date] => 2018-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5264 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16109720 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/109720
System and method for performing per-bank memory refresh Aug 21, 2018 Issued
Array ( [id] => 16895091 [patent_doc_number] => 11036645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Secure userspace networking for guests [patent_app_type] => utility [patent_app_number] => 15/998887 [patent_app_country] => US [patent_app_date] => 2018-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6759 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15998887 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/998887
Secure userspace networking for guests Aug 15, 2018 Issued
Array ( [id] => 13905915 [patent_doc_number] => 20190042162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => BACK-END MEMORY CHANNEL THAT RESIDES BETWEEN FIRST AND SECOND DIMM SLOTS AND APPLICATIONS THEREOF [patent_app_type] => utility [patent_app_number] => 16/104040 [patent_app_country] => US [patent_app_date] => 2018-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6320 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16104040 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/104040
BACK-END MEMORY CHANNEL THAT RESIDES BETWEEN FIRST AND SECOND DIMM SLOTS AND APPLICATIONS THEREOF Aug 15, 2018 Abandoned
Array ( [id] => 16879972 [patent_doc_number] => 11030121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Apparatus and method for comparing regions associated with first and second bounded pointers [patent_app_type] => utility [patent_app_number] => 16/055240 [patent_app_country] => US [patent_app_date] => 2018-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 10527 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 402 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16055240 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/055240
Apparatus and method for comparing regions associated with first and second bounded pointers Aug 5, 2018 Issued
Array ( [id] => 13579753 [patent_doc_number] => 20180341425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => MIGRATING DATA BETWEEN MEMORIES [patent_app_type] => utility [patent_app_number] => 16/054926 [patent_app_country] => US [patent_app_date] => 2018-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16054926 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/054926
MIGRATING DATA BETWEEN MEMORIES Aug 2, 2018 Abandoned
Array ( [id] => 15367157 [patent_doc_number] => 20200019343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => METHOD AND APPARATUS FOR A DURABLE LOW LATENCY SYSTEM ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 16/035359 [patent_app_country] => US [patent_app_date] => 2018-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11155 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16035359 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/035359
METHOD AND APPARATUS FOR A DURABLE LOW LATENCY SYSTEM ARCHITECTURE Jul 12, 2018 Abandoned
Array ( [id] => 16307410 [patent_doc_number] => 10776203 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-15 [patent_title] => Storage system with inter-stretch transcoding [patent_app_type] => utility [patent_app_number] => 16/020847 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13327 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020847 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/020847
Storage system with inter-stretch transcoding Jun 26, 2018 Issued
Array ( [id] => 16386262 [patent_doc_number] => 10811103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Memory controller, memory system, and method of operating memory system [patent_app_type] => utility [patent_app_number] => 16/020100 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 10195 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020100 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/020100
Memory controller, memory system, and method of operating memory system Jun 26, 2018 Issued
Array ( [id] => 15386967 [patent_doc_number] => 10534669 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-14 [patent_title] => Storage system with inter-stretch transcoding [patent_app_type] => utility [patent_app_number] => 16/020825 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13322 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020825 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/020825
Storage system with inter-stretch transcoding Jun 26, 2018 Issued
Array ( [id] => 14704575 [patent_doc_number] => 10380035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Using an access increment number to control a duration during which tracks remain in cache [patent_app_type] => utility [patent_app_number] => 16/016405 [patent_app_country] => US [patent_app_date] => 2018-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6568 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16016405 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/016405
Using an access increment number to control a duration during which tracks remain in cache Jun 21, 2018 Issued
Array ( [id] => 16355310 [patent_doc_number] => 10795822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => System and method for negative feedback cache data flush in primary storage systems [patent_app_type] => utility [patent_app_number] => 16/007240 [patent_app_country] => US [patent_app_date] => 2018-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16007240 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/007240
System and method for negative feedback cache data flush in primary storage systems Jun 12, 2018 Issued
Array ( [id] => 13991917 [patent_doc_number] => 20190065116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => STORAGE DEVICE AND COMMUNICATION CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 16/001143 [patent_app_country] => US [patent_app_date] => 2018-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16001143 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/001143
Storage device and communication control method Jun 5, 2018 Issued
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