Fang-xing Jiang

Array ( [id] => 4863927 [patent_doc_number] => 20080142986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-19 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/000611 [patent_app_country] => US [patent_app_date] => 2007-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 8259 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20080142986.pdf [firstpage_image] =>[orig_patent_app_number] => 12000611 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4890796 [patent_doc_number] => 20080099893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'CONNECTING A PLURALITY OF BOND PADS AND/OR INNER LEADS WITH A SINGLE BOND WIRE' [patent_app_type] => utility [patent_app_number] => 11/955856 [patent_app_country] => US [patent_app_date] => 2007-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4930 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20080099893.pdf [firstpage_image] =>[orig_patent_app_number] => 11955856 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9582930 [patent_doc_number] => 08772933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Interconnect structure and method of making same' [patent_app_type] => utility [patent_app_number] => 11/954812 [patent_app_country] => US [patent_app_date] => 2007-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3358 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11954812 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5419832 [patent_doc_number] => 20090146286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'DIRECT ATTACH INTERCONNECT FOR CONNECTING PACKAGE AND PRINTED CIRCUIT BOARD' [patent_app_type] => utility [patent_app_number] => 11/950592 [patent_app_country] => US [patent_app_date] => 2007-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4297 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20090146286.pdf [firstpage_image] =>[orig_patent_app_number] => 11950592 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5573059 [patent_doc_number] => 20090140420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-04 [patent_title] => 'SOFT ERROR RATE MITIGATION BY INTERCONNECT STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/947832 [patent_app_country] => US [patent_app_date] => 2007-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3397 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20090140420.pdf [firstpage_image] =>[orig_patent_app_number] => 11947832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5275545 [patent_doc_number] => 20090127677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'Multi-Terminal Package Assembly For Semiconductor Devices' [patent_app_type] => utility [patent_app_number] => 11/944281 [patent_app_country] => US [patent_app_date] => 2007-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5496 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20090127677.pdf [firstpage_image] =>[orig_patent_app_number] => 11944281 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8203026 [patent_doc_number] => 08188607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Layout structure for chip coupling' [patent_app_type] => utility [patent_app_number] => 11/941631 [patent_app_country] => US [patent_app_date] => 2007-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2700 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/188/08188607.pdf [firstpage_image] =>[orig_patent_app_number] => 11941631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5275544 [patent_doc_number] => 20090127676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'Back to Back Die Assembly For Semiconductor Devices' [patent_app_type] => utility [patent_app_number] => 11/941322 [patent_app_country] => US [patent_app_date] => 2007-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7361 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20090127676.pdf [firstpage_image] =>[orig_patent_app_number] => 11941322 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5282402 [patent_doc_number] => 20090096076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'STACKED SEMICONDUCTOR PACKAGE WITHOUT REDUCTION IN STATA STORAGE CAPACITY AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/940812 [patent_app_country] => US [patent_app_date] => 2007-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5307 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20090096076.pdf [firstpage_image] =>[orig_patent_app_number] => 11940812 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4614221 [patent_doc_number] => 07989895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Integration using package stacking with multi-layer organic substrates' [patent_app_type] => utility [patent_app_number] => 11/940952 [patent_app_country] => US [patent_app_date] => 2007-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5545 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/989/07989895.pdf [firstpage_image] =>[orig_patent_app_number] => 11940952 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5407437 [patent_doc_number] => 20090121335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION' [patent_app_type] => utility [patent_app_number] => 11/938371 [patent_app_country] => US [patent_app_date] => 2007-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11377 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20090121335.pdf [firstpage_image] =>[orig_patent_app_number] => 11938371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4820785 [patent_doc_number] => 20080122056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'Semiconductor device package' [patent_app_type] => utility [patent_app_number] => 11/983451 [patent_app_country] => US [patent_app_date] => 2007-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4049 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20080122056.pdf [firstpage_image] =>[orig_patent_app_number] => 11983451 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5262368 [patent_doc_number] => 20090115053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'Semiconductor Package Thermal Performance Enhancement and Method' [patent_app_type] => utility [patent_app_number] => 11/934511 [patent_app_country] => US [patent_app_date] => 2007-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2762 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20090115053.pdf [firstpage_image] =>[orig_patent_app_number] => 11934511 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5262339 [patent_doc_number] => 20090115024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'Seal ring structure with improved cracking protection and reduced problems' [patent_app_type] => utility [patent_app_number] => 11/933931 [patent_app_country] => US [patent_app_date] => 2007-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5434 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20090115024.pdf [firstpage_image] =>[orig_patent_app_number] => 11933931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5327828 [patent_doc_number] => 20090108305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'SEMICONDUCTOR HAVING A CORNER COMPENSATION FEATURE AND METHOD' [patent_app_type] => utility [patent_app_number] => 11/927962 [patent_app_country] => US [patent_app_date] => 2007-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5107 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20090108305.pdf [firstpage_image] =>[orig_patent_app_number] => 11927962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5327924 [patent_doc_number] => 20090108401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/924691 [patent_app_country] => US [patent_app_date] => 2007-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5759 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20090108401.pdf [firstpage_image] =>[orig_patent_app_number] => 11924691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4768771 [patent_doc_number] => 20080054427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'SEMICONDUCTOR DEVICES AND MANUFACTURING METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 11/877046 [patent_app_country] => US [patent_app_date] => 2007-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12568 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20080054427.pdf [firstpage_image] =>[orig_patent_app_number] => 11877046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8386671 [patent_doc_number] => 08264072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-11 [patent_title] => 'Electronic device' [patent_app_type] => utility [patent_app_number] => 11/876271 [patent_app_country] => US [patent_app_date] => 2007-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4119 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11876271 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4870769 [patent_doc_number] => 20080197503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'CHIP PACKAGE' [patent_app_type] => utility [patent_app_number] => 11/876381 [patent_app_country] => US [patent_app_date] => 2007-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1756 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20080197503.pdf [firstpage_image] =>[orig_patent_app_number] => 11876381 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6611382 [patent_doc_number] => 20100002896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-07 [patent_title] => 'Hearing Aid Having an Occlusion Reduction Unit and Method for Occlusion Reduction' [patent_app_type] => utility [patent_app_number] => 12/311629 [patent_app_country] => US [patent_app_date] => 2007-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7238 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20100002896.pdf [firstpage_image] =>[orig_patent_app_number] => 12311629 [rel_patent_id] =>[rel_patent_doc_number] =>)