Search

Fang-xing Jiang

Examiner (ID: 7225, Phone: (571)270-7548 , Office: P/2815 )

Most Active Art Unit
2815
Art Unit(s)
2815
Total Applications
386
Issued Applications
221
Pending Applications
0
Abandoned Applications
168

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10631560 [patent_doc_number] => 09349716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-24 [patent_title] => 'Electrostatic discharge protection device' [patent_app_type] => utility [patent_app_number] => 13/760367 [patent_app_country] => US [patent_app_date] => 2013-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 39 [patent_no_of_words] => 12934 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13760367 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/760367
Electrostatic discharge protection device Feb 5, 2013 Issued
Array ( [id] => 10073563 [patent_doc_number] => 09111928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Switch circuit package module' [patent_app_type] => utility [patent_app_number] => 13/760079 [patent_app_country] => US [patent_app_date] => 2013-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 15976 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13760079 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/760079
Switch circuit package module Feb 5, 2013 Issued
Array ( [id] => 8973792 [patent_doc_number] => 20130207222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'SUPER-JUNCTION SCHOTTKY OXIDE PIN DIODE HAVING THIN P-TYPE LAYERS UNDER THE SCHOTTKY CONTACT' [patent_app_type] => utility [patent_app_number] => 13/760894 [patent_app_country] => US [patent_app_date] => 2013-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3583 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13760894 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/760894
Super-junction schottky oxide pin diode having thin P-type layers under the schottky contact Feb 5, 2013 Issued
Array ( [id] => 8914029 [patent_doc_number] => 20130175654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'BULK NANOHOLE STRUCTURES FOR THERMOELECTRIC DEVICES AND METHODS FOR MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/760977 [patent_app_country] => US [patent_app_date] => 2013-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 16853 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13760977 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/760977
BULK NANOHOLE STRUCTURES FOR THERMOELECTRIC DEVICES AND METHODS FOR MAKING THE SAME Feb 5, 2013 Abandoned
Array ( [id] => 10100056 [patent_doc_number] => 09136376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Semiconductor device having junctionless vertical gate transistor and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/759395 [patent_app_country] => US [patent_app_date] => 2013-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 40 [patent_no_of_words] => 10358 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13759395 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/759395
Semiconductor device having junctionless vertical gate transistor and method of manufacturing the same Feb 4, 2013 Issued
Array ( [id] => 11483316 [patent_doc_number] => 09589872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-07 [patent_title] => 'Integrated dual power converter package having internal driver IC' [patent_app_type] => utility [patent_app_number] => 13/759734 [patent_app_country] => US [patent_app_date] => 2013-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2572 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13759734 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/759734
Integrated dual power converter package having internal driver IC Feb 4, 2013 Issued
Array ( [id] => 10563507 [patent_doc_number] => 09287188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-15 [patent_title] => 'Method and apparatus for a seal ring structure' [patent_app_type] => utility [patent_app_number] => 13/759549 [patent_app_country] => US [patent_app_date] => 2013-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 6222 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13759549 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/759549
Method and apparatus for a seal ring structure Feb 4, 2013 Issued
Array ( [id] => 9594713 [patent_doc_number] => 20140191390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'Metal Routing Architecture for Integrated Circuits' [patent_app_type] => utility [patent_app_number] => 13/734573 [patent_app_country] => US [patent_app_date] => 2013-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3019 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13734573 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/734573
Metal routing architecture for integrated circuits Jan 3, 2013 Issued
Array ( [id] => 8777389 [patent_doc_number] => 20130099364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'Top-side Cooled Semiconductor Package with Stacked Interconnection Plates and Method' [patent_app_type] => utility [patent_app_number] => 13/710786 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7025 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13710786 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/710786
Top-side Cooled Semiconductor Package with Stacked Interconnection Plates and Method Dec 10, 2012 Abandoned
Array ( [id] => 10440691 [patent_doc_number] => 20150325703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-12 [patent_title] => 'SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/440787 [patent_app_country] => US [patent_app_date] => 2012-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7796 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14440787 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/440787
Semiconductor devices and methods for manufacturing the same Dec 3, 2012 Issued
Array ( [id] => 8753623 [patent_doc_number] => 20130087927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'MULTIMEDIA PROVIDING SERVICE' [patent_app_type] => utility [patent_app_number] => 13/687594 [patent_app_country] => US [patent_app_date] => 2012-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7829 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13687594 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/687594
MULTIMEDIA PROVIDING SERVICE Nov 27, 2012 Abandoned
Array ( [id] => 8753615 [patent_doc_number] => 20130087919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'LIGHTWEIGHT AND COMPACT THROUGH-SILICON VIA STACK PACKAGE WITH EXCELLENT ELECTRICAL CONNECTIONS AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/686405 [patent_app_country] => US [patent_app_date] => 2012-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4712 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686405 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/686405
LIGHTWEIGHT AND COMPACT THROUGH-SILICON VIA STACK PACKAGE WITH EXCELLENT ELECTRICAL CONNECTIONS AND METHOD FOR MANUFACTURING THE SAME Nov 26, 2012 Abandoned
Array ( [id] => 9001277 [patent_doc_number] => 20130222401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'SEMICONDUCTOR PACKAGE, AND INFORMATION PROCESSING APPARATUS AND STORAGE DEVICE INCLUDING THE SEMICONDUCTOR PACKAGES' [patent_app_type] => utility [patent_app_number] => 13/600670 [patent_app_country] => US [patent_app_date] => 2012-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3092 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13600670 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/600670
SEMICONDUCTOR PACKAGE, AND INFORMATION PROCESSING APPARATUS AND STORAGE DEVICE INCLUDING THE SEMICONDUCTOR PACKAGES Aug 30, 2012 Abandoned
Array ( [id] => 10570281 [patent_doc_number] => 09293460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'ESD protection device with improved bipolar gain using cutout in the body well' [patent_app_type] => utility [patent_app_number] => 13/594106 [patent_app_country] => US [patent_app_date] => 2012-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7408 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13594106 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/594106
ESD protection device with improved bipolar gain using cutout in the body well Aug 23, 2012 Issued
Array ( [id] => 8680854 [patent_doc_number] => 20130049137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/589160 [patent_app_country] => US [patent_app_date] => 2012-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 68 [patent_figures_cnt] => 68 [patent_no_of_words] => 48338 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13589160 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/589160
Semiconductor device Aug 18, 2012 Issued
Array ( [id] => 8960776 [patent_doc_number] => 20130200378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'METHOD AND APPARATUS FOR FORMING ORGANIC MATERIAL PATTERN, ORGANIC LIGHT EMITTING DISPLAY APPARATUS, AND METHOD OF MANUFACTURING ORGANIC LIGHT EMITTING DISPLAY APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/588789 [patent_app_country] => US [patent_app_date] => 2012-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7743 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13588789 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/588789
METHOD AND APPARATUS FOR FORMING ORGANIC MATERIAL PATTERN, ORGANIC LIGHT EMITTING DISPLAY APPARATUS, AND METHOD OF MANUFACTURING ORGANIC LIGHT EMITTING DISPLAY APPARATUS Aug 16, 2012 Abandoned
Array ( [id] => 11187696 [patent_doc_number] => 09419108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-16 [patent_title] => 'Semiconductor structure and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/406904 [patent_app_country] => US [patent_app_date] => 2012-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 4318 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14406904 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/406904
Semiconductor structure and method for manufacturing the same Aug 16, 2012 Issued
Array ( [id] => 9267104 [patent_doc_number] => 20140022020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'SEMICONDUCTOR PACKAGE DESIGN PROVIDING REDUCED ELECTROMAGNETIC COUPLING BETWEEN CIRCUIT COMPONENTS' [patent_app_type] => utility [patent_app_number] => 13/554034 [patent_app_country] => US [patent_app_date] => 2012-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5516 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13554034 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/554034
Semiconductor package design providing reduced electromagnetic coupling between circuit components Jul 19, 2012 Issued
Array ( [id] => 8610199 [patent_doc_number] => 20130015511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/546322 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13546322 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/546322
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Jul 10, 2012 Abandoned
Array ( [id] => 9220273 [patent_doc_number] => 20140015048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'FinFET with Trench Field Plate' [patent_app_type] => utility [patent_app_number] => 13/546738 [patent_app_country] => US [patent_app_date] => 2012-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2488 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13546738 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/546738
FinFET with trench field plate Jul 10, 2012 Issued
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