Search

Fang-xing Jiang

Examiner (ID: 581, Phone: (571)270-7548 , Office: P/2815 )

Most Active Art Unit
2815
Art Unit(s)
2815
Total Applications
386
Issued Applications
221
Pending Applications
0
Abandoned Applications
168

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8037015 [patent_doc_number] => 20120068229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'Massively Parallel Interconnect Fabric for Complex Semiconductor Devices' [patent_app_type] => utility [patent_app_number] => 13/304681 [patent_app_country] => US [patent_app_date] => 2011-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 69 [patent_figures_cnt] => 69 [patent_no_of_words] => 20253 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20120068229.pdf [firstpage_image] =>[orig_patent_app_number] => 13304681 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/304681
Massively parallel interconnect fabric for complex semiconductor devices Nov 26, 2011 Issued
Array ( [id] => 7765467 [patent_doc_number] => 20120033839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-09 [patent_title] => 'EXTERIOR POWER SUPPLY FOR HEARING AID' [patent_app_type] => utility [patent_app_number] => 13/273772 [patent_app_country] => US [patent_app_date] => 2011-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2153 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20120033839.pdf [firstpage_image] =>[orig_patent_app_number] => 13273772 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/273772
Exterior power supply for hearing aid Oct 13, 2011 Issued
Array ( [id] => 10508402 [patent_doc_number] => 09236278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-12 [patent_title] => 'Integrated circuit packaging system with a substrate embedded dummy-die paddle and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 13/242306 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 9270 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13242306 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/242306
Integrated circuit packaging system with a substrate embedded dummy-die paddle and method of manufacture thereof Sep 22, 2011 Issued
Array ( [id] => 8513832 [patent_doc_number] => 20120313240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/241285 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3349 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13241285 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/241285
SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF Sep 22, 2011 Abandoned
Array ( [id] => 9202336 [patent_doc_number] => 20140001513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'LAYER SYSTEM OF A SILICON-BASED SUPPORT AND A HETEROSTRUCTURE APPLIED DIRECTLY ONTO THE SUPPORT' [patent_app_type] => utility [patent_app_number] => 13/824436 [patent_app_country] => US [patent_app_date] => 2011-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3548 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13824436 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/824436
LAYER SYSTEM OF A SILICON-BASED SUPPORT AND A HETEROSTRUCTURE APPLIED DIRECTLY ONTO THE SUPPORT Aug 30, 2011 Abandoned
Array ( [id] => 7648837 [patent_doc_number] => 20110298106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MAGNETIC FILM AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/211303 [patent_app_country] => US [patent_app_date] => 2011-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0298/20110298106.pdf [firstpage_image] =>[orig_patent_app_number] => 13211303 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/211303
Integrated circuit packaging system with magnetic film and method of manufacture thereof Aug 15, 2011 Issued
Array ( [id] => 8610217 [patent_doc_number] => 20130015529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/266607 [patent_app_country] => US [patent_app_date] => 2011-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6629 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13266607 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/266607
Semiconductor device structure and method for manufacturing the same Aug 9, 2011 Issued
Array ( [id] => 8852891 [patent_doc_number] => 20130142566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-06 [patent_title] => 'ELECTROCHEMICAL METHODS FOR WIRE BONDING' [patent_app_type] => utility [patent_app_number] => 13/702799 [patent_app_country] => US [patent_app_date] => 2011-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15855 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13702799 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/702799
ELECTROCHEMICAL METHODS FOR WIRE BONDING Jun 7, 2011 Abandoned
Array ( [id] => 7699386 [patent_doc_number] => 20110227204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/152971 [patent_app_country] => US [patent_app_date] => 2011-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3167 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20110227204.pdf [firstpage_image] =>[orig_patent_app_number] => 13152971 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/152971
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE Jun 2, 2011 Abandoned
Array ( [id] => 8071617 [patent_doc_number] => 20110241212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'STRESS LAYER STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/150341 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2761 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241212.pdf [firstpage_image] =>[orig_patent_app_number] => 13150341 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/150341
STRESS LAYER STRUCTURE May 31, 2011 Abandoned
Array ( [id] => 6176380 [patent_doc_number] => 20110177686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-21 [patent_title] => 'Stable Gold Bump Solder Connections' [patent_app_type] => utility [patent_app_number] => 13/074227 [patent_app_country] => US [patent_app_date] => 2011-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4081 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20110177686.pdf [firstpage_image] =>[orig_patent_app_number] => 13074227 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/074227
Stable Gold Bump Solder Connections Mar 28, 2011 Abandoned
Array ( [id] => 5963510 [patent_doc_number] => 20110147930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'Semiconductor Component of Semiconductor Chip Size with Flip-Chip-Like External Contacts' [patent_app_type] => utility [patent_app_number] => 13/038577 [patent_app_country] => US [patent_app_date] => 2011-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5801 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20110147930.pdf [firstpage_image] =>[orig_patent_app_number] => 13038577 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/038577
Semiconductor component of semiconductor chip size with flip-chip-like external contacts Mar 1, 2011 Issued
Array ( [id] => 6083494 [patent_doc_number] => 20110215335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'Organic light emitting diode display and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 12/929994 [patent_app_country] => US [patent_app_date] => 2011-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8049 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20110215335.pdf [firstpage_image] =>[orig_patent_app_number] => 12929994 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929994
Organic light emitting diode display and manufacturing method thereof Feb 28, 2011 Issued
Array ( [id] => 6010646 [patent_doc_number] => 20110221043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 12/932560 [patent_app_country] => US [patent_app_date] => 2011-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2619 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20110221043.pdf [firstpage_image] =>[orig_patent_app_number] => 12932560 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/932560
Semiconductor device and manufacturing method therefor Feb 27, 2011 Issued
Array ( [id] => 5963120 [patent_doc_number] => 20110147760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'Semiconductor apparatus with thin semiconductor film' [patent_app_type] => utility [patent_app_number] => 12/929910 [patent_app_country] => US [patent_app_date] => 2011-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 12424 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20110147760.pdf [firstpage_image] =>[orig_patent_app_number] => 12929910 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929910
Semiconductor apparatus with thin semiconductor film Feb 23, 2011 Issued
Array ( [id] => 10040265 [patent_doc_number] => 09080967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Electronic component for high temperatures' [patent_app_type] => utility [patent_app_number] => 12/931496 [patent_app_country] => US [patent_app_date] => 2011-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2543 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12931496 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/931496
Electronic component for high temperatures Jan 31, 2011 Issued
Array ( [id] => 9824019 [patent_doc_number] => 08933506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-13 [patent_title] => 'Diode structures with controlled injection efficiency for fast switching' [patent_app_type] => utility [patent_app_number] => 12/931429 [patent_app_country] => US [patent_app_date] => 2011-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5685 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12931429 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/931429
Diode structures with controlled injection efficiency for fast switching Jan 30, 2011 Issued
Array ( [id] => 8469693 [patent_doc_number] => 08298871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Method and leadframe for packaging integrated circuits' [patent_app_type] => utility [patent_app_number] => 13/004639 [patent_app_country] => US [patent_app_date] => 2011-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5620 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13004639 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/004639
Method and leadframe for packaging integrated circuits Jan 10, 2011 Issued
Array ( [id] => 9389944 [patent_doc_number] => 08686548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'Wiring substrate, method for manufacturing wiring substrate, and semiconductor package including wiring substrate' [patent_app_type] => utility [patent_app_number] => 12/987398 [patent_app_country] => US [patent_app_date] => 2011-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 33 [patent_no_of_words] => 15012 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12987398 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/987398
Wiring substrate, method for manufacturing wiring substrate, and semiconductor package including wiring substrate Jan 9, 2011 Issued
Array ( [id] => 8287373 [patent_doc_number] => 20120175700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'TRENCH MOS RECTIFIER' [patent_app_type] => utility [patent_app_number] => 12/985361 [patent_app_country] => US [patent_app_date] => 2011-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3567 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12985361 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/985361
TRENCH MOS RECTIFIER Jan 5, 2011 Abandoned
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