Search

Farley J. Abad

Examiner (ID: 5485, Phone: (571)270-3425 , Office: P/2181 )

Most Active Art Unit
2181
Art Unit(s)
2181
Total Applications
1109
Issued Applications
894
Pending Applications
94
Abandoned Applications
141

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17947861 [patent_doc_number] => 20220334880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => Tensor Accelerator Capable of Increasing Efficiency of Data Sharing [patent_app_type] => utility [patent_app_number] => 17/231011 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17231011 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/231011
Tensor accelerator capable of increasing efficiency of data sharing Apr 14, 2021 Issued
Array ( [id] => 17931820 [patent_doc_number] => 20220326945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => PARALLEL MATRIX MULTIPLICATION TECHNIQUE OPTIMIZED FOR MEMORY FETCHES [patent_app_type] => utility [patent_app_number] => 17/228484 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228484 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/228484
Parallel matrix multiplication technique optimized for memory fetches Apr 11, 2021 Issued
Array ( [id] => 17915623 [patent_doc_number] => 20220318019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => SYSTEMS AND METHODS FOR EFFICIENT TRANSFER OF LOG DATA [patent_app_type] => utility [patent_app_number] => 17/301377 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9344 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17301377 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/301377
Systems and methods for efficient transfer of log data Mar 30, 2021 Issued
Array ( [id] => 16964814 [patent_doc_number] => 20210216313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => VECTOR MAXIMUM AND MINIMUM WITH INDEXING [patent_app_type] => utility [patent_app_number] => 17/215013 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11708 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17215013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/215013
Vector maximum and minimum with indexing Mar 28, 2021 Issued
Array ( [id] => 18668399 [patent_doc_number] => 11775299 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-10-03 [patent_title] => Vector clocks for highly concurrent execution engines [patent_app_type] => utility [patent_app_number] => 17/215912 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 10510 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17215912 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/215912
Vector clocks for highly concurrent execution engines Mar 28, 2021 Issued
Array ( [id] => 17437837 [patent_doc_number] => 11263170 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-01 [patent_title] => Lossless tiling in convolution networks--padding before tiling, location-based tiling, and zeroing-out [patent_app_type] => utility [patent_app_number] => 17/216657 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 32 [patent_no_of_words] => 50325 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17216657 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/216657
Lossless tiling in convolution networks--padding before tiling, location-based tiling, and zeroing-out Mar 28, 2021 Issued
Array ( [id] => 17085218 [patent_doc_number] => 20210280225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => MULTIPLE CONCURRENT MODULATION SCHEMES IN A MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/212708 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36466 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212708 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212708
Multiple concurrent modulation schemes in a memory system Mar 24, 2021 Issued
Array ( [id] => 18828531 [patent_doc_number] => 11843830 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Systems, methods, and media for managing an entertainment system [patent_app_type] => utility [patent_app_number] => 17/208113 [patent_app_country] => US [patent_app_date] => 2021-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7556 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17208113 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/208113
Systems, methods, and media for managing an entertainment system Mar 21, 2021 Issued
Array ( [id] => 19669931 [patent_doc_number] => 12182691 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-12-31 [patent_title] => Increasing performance of computational array accelerators [patent_app_type] => utility [patent_app_number] => 17/249900 [patent_app_country] => US [patent_app_date] => 2021-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 14430 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17249900 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/249900
Increasing performance of computational array accelerators Mar 16, 2021 Issued
Array ( [id] => 17113977 [patent_doc_number] => 20210294574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => ELECTRONIC CONTROL APPARATUS [patent_app_type] => utility [patent_app_number] => 17/191848 [patent_app_country] => US [patent_app_date] => 2021-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17191848 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/191848
Electronic control apparatus Mar 3, 2021 Issued
Array ( [id] => 17600980 [patent_doc_number] => 20220150555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => High Definition Multimedia Interface Transmission Device and Control Method Thereof [patent_app_type] => utility [patent_app_number] => 17/186009 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5588 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17186009 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/186009
High definition multimedia interface transmission device and control method thereof Feb 25, 2021 Issued
Array ( [id] => 17194833 [patent_doc_number] => 11163586 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-02 [patent_title] => Automated configuration of application program instance [patent_app_type] => utility [patent_app_number] => 17/183026 [patent_app_country] => US [patent_app_date] => 2021-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12848 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17183026 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/183026
Automated configuration of application program instance Feb 22, 2021 Issued
Array ( [id] => 19442940 [patent_doc_number] => 12093204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => SerDes interface circuit and control device [patent_app_type] => utility [patent_app_number] => 17/793723 [patent_app_country] => US [patent_app_date] => 2021-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6138 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17793723 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/793723
SerDes interface circuit and control device Feb 15, 2021 Issued
Array ( [id] => 17751460 [patent_doc_number] => 20220229665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => METHODS AND APPARATUS FOR REORDERING SIGNALS [patent_app_type] => utility [patent_app_number] => 17/248346 [patent_app_country] => US [patent_app_date] => 2021-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17248346 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/248346
Methods and apparatus for reordering signals Jan 20, 2021 Issued
Array ( [id] => 16950193 [patent_doc_number] => 20210208885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => PROCESSING-IN-MEMORY (PIM) DEVICE FOR IMPLEMENTING A QUANTIZATION SCHEME [patent_app_type] => utility [patent_app_number] => 17/143984 [patent_app_country] => US [patent_app_date] => 2021-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17143984 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/143984
Processing-in-memory (PIM) device for implementing a quantization scheme Jan 6, 2021 Issued
Array ( [id] => 19639110 [patent_doc_number] => 12169719 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-12-17 [patent_title] => Instruction set architecture (ISA) format for multiple instruction set architectures in machine learning inference engine [patent_app_type] => utility [patent_app_number] => 17/248045 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12799 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17248045 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/248045
Instruction set architecture (ISA) format for multiple instruction set architectures in machine learning inference engine Jan 5, 2021 Issued
Array ( [id] => 19167623 [patent_doc_number] => 11983532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Optimize bound information accesses in buffer protection [patent_app_type] => utility [patent_app_number] => 17/137708 [patent_app_country] => US [patent_app_date] => 2020-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8257 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17137708 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/137708
Optimize bound information accesses in buffer protection Dec 29, 2020 Issued
Array ( [id] => 18795657 [patent_doc_number] => 11829439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Methods and apparatus to perform matrix multiplication in a streaming processor [patent_app_type] => utility [patent_app_number] => 17/137226 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 15539 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17137226 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/137226
Methods and apparatus to perform matrix multiplication in a streaming processor Dec 28, 2020 Issued
Array ( [id] => 17706737 [patent_doc_number] => 20220206743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => INSTRUCTIONS TO CONVERT FROM FP16 TO BF8 [patent_app_type] => utility [patent_app_number] => 17/134358 [patent_app_country] => US [patent_app_date] => 2020-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13081 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134358 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/134358
Instructions to convert from FP16 to BF8 Dec 25, 2020 Issued
Array ( [id] => 17690359 [patent_doc_number] => 20220197652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO MERGE PORTIONS OF TWO SOURCE TWO-DIMENSIONAL ARRAYS WITHOUT EXPLICIT PER-PORTION CONTROL [patent_app_type] => utility [patent_app_number] => 17/131733 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 50050 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131733 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131733
PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS TO MERGE PORTIONS OF TWO SOURCE TWO-DIMENSIONAL ARRAYS WITHOUT EXPLICIT PER-PORTION CONTROL Dec 21, 2020 Abandoned
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