Farley J. Abad

Array ( [id] => 17260908 [patent_doc_number] => 20210373893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => PARALLEL LOAD OF MAPPING CONTAINERS FOR DATABASE SYSTEM START AND RESTART OPERATIONS [patent_app_type] => utility [patent_app_number] => 16/883241 [patent_app_country] => US [patent_app_date] => 2020-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17528560 [patent_doc_number] => 11301248 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Method and apparatus for dual multiplication units in a data path [patent_app_type] => utility [patent_app_number] => 16/878603 [patent_app_country] => US [patent_app_date] => 2020-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 61 [patent_no_of_words] => 38530 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16878603 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16470261 [patent_doc_number] => 20200371798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => Method and Apparatus for Vector Based Matrix Multiplication [patent_app_type] => utility [patent_app_number] => 16/878607 [patent_app_country] => US [patent_app_date] => 2020-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16878607 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16833916 [patent_doc_number] => 11010167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Instruction-based non-deterministic finite state automata accelerator [patent_app_type] => utility [patent_app_number] => 16/877102 [patent_app_country] => US [patent_app_date] => 2020-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 18250 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16877102 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16794767 [patent_doc_number] => 20210124584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => STORAGE DEVICES MAPPED TO REGISTERS AND MAPPING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 16/871649 [patent_app_country] => US [patent_app_date] => 2020-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16871649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17216376 [patent_doc_number] => 20210349714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => ACCELERATION CIRCUITRY FOR POSIT OPERATIONS [patent_app_type] => utility [patent_app_number] => 16/871614 [patent_app_country] => US [patent_app_date] => 2020-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16871614 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17771297 [patent_doc_number] => 11403239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => PIM device, computing system including the PIM device, and operating method of the PIM device [patent_app_type] => utility [patent_app_number] => 16/869853 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6453 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869853 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19427009 [patent_doc_number] => 12086431 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-09-10 [patent_title] => Selective communication protocol layering for synchronous replication [patent_app_type] => utility [patent_app_number] => 16/862678 [patent_app_country] => US [patent_app_date] => 2020-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 48747 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16862678 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17437710 [patent_doc_number] => 11263043 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-01 [patent_title] => Managing processor core synchronization using interrupts [patent_app_type] => utility [patent_app_number] => 16/862698 [patent_app_country] => US [patent_app_date] => 2020-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11520 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16862698 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17352179 [patent_doc_number] => 11226816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-18 [patent_title] => Systems and methods for data placement for in-memory-compute [patent_app_type] => utility [patent_app_number] => 16/859829 [patent_app_country] => US [patent_app_date] => 2020-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 13249 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16859829 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19276476 [patent_doc_number] => 12026606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Fractal calculating device and method, integrated circuit and board card [patent_app_type] => utility [patent_app_number] => 17/606838 [patent_app_country] => US [patent_app_date] => 2020-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 45553 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17606838 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18950095 [patent_doc_number] => 11893391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Processing computing jobs via an acceleration device [patent_app_type] => utility [patent_app_number] => 17/438388 [patent_app_country] => US [patent_app_date] => 2020-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 16903 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17438388 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16401072 [patent_doc_number] => 20200341930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => Machine Templates For Predetermined Compute Units [patent_app_type] => utility [patent_app_number] => 16/857941 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16857941 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17143730 [patent_doc_number] => 20210311743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => MICROPROCESSOR HAVING SELF-RESETTING REGISTER SCOREBOARD [patent_app_type] => utility [patent_app_number] => 16/836931 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7531 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16836931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19167622 [patent_doc_number] => 11983530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Reconfigurable digital signal processing (DSP) vector engine [patent_app_type] => utility [patent_app_number] => 16/833164 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 33 [patent_no_of_words] => 15463 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16833164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18370887 [patent_doc_number] => 11651064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Processor authentication method [patent_app_type] => utility [patent_app_number] => 16/832966 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16832966 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16455686 [patent_doc_number] => 20200365112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/829430 [patent_app_country] => US [patent_app_date] => 2020-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12551 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16829430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16116059 [patent_doc_number] => 20200210052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => APPARATUS AND METHOD FOR REMOTELY CONTROLLING PERIPHERAL DEVICES IN MOBILE COMMUNICATION TERMINAL [patent_app_type] => utility [patent_app_number] => 16/818790 [patent_app_country] => US [patent_app_date] => 2020-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4088 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16818790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16330896 [patent_doc_number] => 20200301862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => PIN MULTIPLEXER AND METHOD FOR CONTROLLING PIN MULTIPLEXER [patent_app_type] => utility [patent_app_number] => 16/812362 [patent_app_country] => US [patent_app_date] => 2020-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2965 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16812362 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17288150 [patent_doc_number] => 11204699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Storage system port maintenance information sharing with host device [patent_app_type] => utility [patent_app_number] => 16/810025 [patent_app_country] => US [patent_app_date] => 2020-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 10306 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810025 [rel_patent_id] =>[rel_patent_doc_number] =>)