Search

Farun Lu

Examiner (ID: 17736, Phone: (571)270-0164 , Office: P/2898 )

Most Active Art Unit
2898
Art Unit(s)
2898
Total Applications
618
Issued Applications
575
Pending Applications
0
Abandoned Applications
47

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18236133 [patent_doc_number] => 11600701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Semiconductor component having a SiC semiconductor body [patent_app_type] => utility [patent_app_number] => 17/223645 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 26 [patent_no_of_words] => 14374 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223645 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/223645
Semiconductor component having a SiC semiconductor body Apr 5, 2021 Issued
Array ( [id] => 16981792 [patent_doc_number] => 20210226029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => SEMICONDUCTOR DEVICE HAVING MODIFIED PROFILE METAL GATE [patent_app_type] => utility [patent_app_number] => 17/301467 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17301467 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/301467
Semiconductor device having modified profile metal gate Apr 4, 2021 Issued
Array ( [id] => 17188819 [patent_doc_number] => 20210335704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/221071 [patent_app_country] => US [patent_app_date] => 2021-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5841 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17221071 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/221071
Semiconductor structure and fabrication method thereof Apr 1, 2021 Issued
Array ( [id] => 18331813 [patent_doc_number] => 11637069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Semiconductor device with V2V rail and methods of making same [patent_app_type] => utility [patent_app_number] => 17/220345 [patent_app_country] => US [patent_app_date] => 2021-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 12935 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220345 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220345
Semiconductor device with V2V rail and methods of making same Mar 31, 2021 Issued
Array ( [id] => 18304580 [patent_doc_number] => 11626497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Semiconductor structure and forming method thereof [patent_app_type] => utility [patent_app_number] => 17/218770 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 11847 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 343 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17218770 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/218770
Semiconductor structure and forming method thereof Mar 30, 2021 Issued
Array ( [id] => 18464485 [patent_doc_number] => 11688782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Semiconductor structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/212476 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9474 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212476 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212476
Semiconductor structure and method for forming the same Mar 24, 2021 Issued
Array ( [id] => 17509101 [patent_doc_number] => 20220102204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => INTEGRATED CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/211455 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15466 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211455 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211455
Integrated circuit structure and manufacturing method thereof Mar 23, 2021 Issued
Array ( [id] => 18175307 [patent_doc_number] => 11575026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Source/drain structure for semiconductor device [patent_app_type] => utility [patent_app_number] => 17/207359 [patent_app_country] => US [patent_app_date] => 2021-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17207359 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/207359
Source/drain structure for semiconductor device Mar 18, 2021 Issued
Array ( [id] => 16936582 [patent_doc_number] => 20210202471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => SHIELDED GATE TRENCH MOSFET WITH ESD DIODE MANUFACTURED USING TWO POLY-SILICON LAYERS PROCESS [patent_app_type] => utility [patent_app_number] => 17/199574 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199574 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/199574
Shielded gate trench MOSFET with ESD diode manufactured using two poly-silicon layers process Mar 11, 2021 Issued
Array ( [id] => 17389648 [patent_doc_number] => 20220037500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => CONTACT STRUCTURES IN SEMICONDCUTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/197892 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8848 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197892 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/197892
Contact structures in semiconductor devices Mar 9, 2021 Issued
Array ( [id] => 18464471 [patent_doc_number] => 11688768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Integrated circuit structure with source/drain spacers [patent_app_type] => utility [patent_app_number] => 17/193721 [patent_app_country] => US [patent_app_date] => 2021-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 52 [patent_no_of_words] => 11060 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17193721 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/193721
Integrated circuit structure with source/drain spacers Mar 4, 2021 Issued
Array ( [id] => 18951128 [patent_doc_number] => 11894435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Contact plug structure of semiconductor device and method of forming same [patent_app_type] => utility [patent_app_number] => 17/193626 [patent_app_country] => US [patent_app_date] => 2021-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 62 [patent_figures_cnt] => 107 [patent_no_of_words] => 16675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17193626 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/193626
Contact plug structure of semiconductor device and method of forming same Mar 4, 2021 Issued
Array ( [id] => 17692238 [patent_doc_number] => 20220199531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => MEMORY DEVICE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/186314 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8073 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17186314 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/186314
Memory device and fabrication method thereof Feb 25, 2021 Issued
Array ( [id] => 18416048 [patent_doc_number] => 11670595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Semiconductor device structure and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/184942 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 32 [patent_no_of_words] => 8046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184942 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/184942
Semiconductor device structure and methods of forming the same Feb 24, 2021 Issued
Array ( [id] => 16888929 [patent_doc_number] => 20210175126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => Metal Gate Structure Cutting Process [patent_app_type] => utility [patent_app_number] => 17/181217 [patent_app_country] => US [patent_app_date] => 2021-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17181217 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/181217
Metal gate structure cutting process Feb 21, 2021 Issued
Array ( [id] => 18494312 [patent_doc_number] => 11699734 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Semiconductor device with resistance reduction element and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 17/172415 [patent_app_country] => US [patent_app_date] => 2021-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8879 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17172415 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/172415
Semiconductor device with resistance reduction element and method for fabricating the same Feb 9, 2021 Issued
Array ( [id] => 18593492 [patent_doc_number] => 11742404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Method of manufacturing a semiconductor device and a semiconductor device [patent_app_type] => utility [patent_app_number] => 17/169892 [patent_app_country] => US [patent_app_date] => 2021-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 44 [patent_no_of_words] => 8728 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17169892 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/169892
Method of manufacturing a semiconductor device and a semiconductor device Feb 7, 2021 Issued
Array ( [id] => 18608253 [patent_doc_number] => 11749732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Etch profile control of via opening [patent_app_type] => utility [patent_app_number] => 17/169458 [patent_app_country] => US [patent_app_date] => 2021-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 63 [patent_figures_cnt] => 63 [patent_no_of_words] => 18630 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17169458 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/169458
Etch profile control of via opening Feb 5, 2021 Issued
Array ( [id] => 18623952 [patent_doc_number] => 11757010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Multi-stage etching process for contact formation in a semiconductor device [patent_app_type] => utility [patent_app_number] => 17/166564 [patent_app_country] => US [patent_app_date] => 2021-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 5490 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17166564 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/166564
Multi-stage etching process for contact formation in a semiconductor device Feb 2, 2021 Issued
Array ( [id] => 18073870 [patent_doc_number] => 11532712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Interconnect structures for semiconductor devices and methods of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/166552 [patent_app_country] => US [patent_app_date] => 2021-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 10500 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17166552 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/166552
Interconnect structures for semiconductor devices and methods of manufacturing the same Feb 2, 2021 Issued
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