Search

Fazli Erdem

Examiner (ID: 17595, Phone: (571)272-1914 , Office: P/2826 )

Most Active Art Unit
2826
Art Unit(s)
2812, 2826
Total Applications
1715
Issued Applications
1399
Pending Applications
121
Abandoned Applications
217

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20383588 [patent_doc_number] => 20250366081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 19/175411 [patent_app_country] => US [patent_app_date] => 2025-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19175411 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/175411
Laterally diffused metal oxide semiconductor device and preparation method thereof Apr 9, 2025 Issued
Array ( [id] => 20418342 [patent_doc_number] => 12501646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Pi-type trench gate silicon carbide MOSFET device and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 18/950687 [patent_app_country] => US [patent_app_date] => 2024-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 0 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 492 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18950687 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/950687
Pi-type trench gate silicon carbide MOSFET device and fabrication method thereof Nov 17, 2024 Issued
Array ( [id] => 20540273 [patent_doc_number] => 12557360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Lateral high voltage semiconductor device and method for forming a lateral high voltage semiconductor device [patent_app_type] => utility [patent_app_number] => 18/897009 [patent_app_country] => US [patent_app_date] => 2024-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2416 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18897009 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/897009
Lateral high voltage semiconductor device and method for forming a lateral high voltage semiconductor device Sep 25, 2024 Issued
Array ( [id] => 19590165 [patent_doc_number] => 20240387722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => SILICON CARBIDE SPLIT-GATE MOSFETS INTEGRATING HIGH-SPEED FREEWHEELING DIODES AND PREPARATION METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/785583 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 490 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785583 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/785583
SILICON CARBIDE SPLIT-GATE MOSFETS INTEGRATING HIGH-SPEED FREEWHEELING DIODES AND PREPARATION METHODS THEREOF Jul 25, 2024 Abandoned
Array ( [id] => 20299480 [patent_doc_number] => 20250324723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/779114 [patent_app_country] => US [patent_app_date] => 2024-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1078 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779114 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/779114
TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Jul 21, 2024 Pending
Array ( [id] => 19546767 [patent_doc_number] => 20240363803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => LIGHT EMITTING DEVICE AND FABRICATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/766027 [patent_app_country] => US [patent_app_date] => 2024-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18766027 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/766027
LIGHT EMITTING DEVICE AND FABRICATING METHOD THEREOF Jul 7, 2024 Pending
Array ( [id] => 19515944 [patent_doc_number] => 20240347630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/756959 [patent_app_country] => US [patent_app_date] => 2024-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6768 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18756959 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/756959
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Jun 26, 2024 Pending
Array ( [id] => 19515702 [patent_doc_number] => 20240347388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/754948 [patent_app_country] => US [patent_app_date] => 2024-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7040 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18754948 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/754948
SEMICONDUCTOR INTEGRATED CIRCUIT Jun 25, 2024 Pending
Array ( [id] => 19821186 [patent_doc_number] => 20250079393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/748354 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6202 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18748354 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/748354
SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME Jun 19, 2024 Pending
Array ( [id] => 20423039 [patent_doc_number] => 20250385124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => SELF-ALIGNED GATE CUT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/742604 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4513 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18742604 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/742604
SELF-ALIGNED GATE CUT STRUCTURE Jun 12, 2024 Pending
Array ( [id] => 19484331 [patent_doc_number] => 20240332373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 18/742974 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10992 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18742974 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/742974
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD Jun 12, 2024 Pending
Array ( [id] => 19468048 [patent_doc_number] => 20240321718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => PACKAGE SUBSTRATE, SEMICONDUCTOR PACKAGE, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/734056 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5618 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18734056 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/734056
PACKAGE SUBSTRATE, SEMICONDUCTOR PACKAGE, AND ELECTRONIC DEVICE Jun 4, 2024 Pending
Array ( [id] => 20399102 [patent_doc_number] => 20250374577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/679331 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2202 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679331 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/679331
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF May 29, 2024 Pending
Array ( [id] => 19452896 [patent_doc_number] => 20240313026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => METHOD FOR FABRICATING HYBRID BONDED STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/674904 [patent_app_country] => US [patent_app_date] => 2024-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6826 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18674904 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/674904
METHOD FOR FABRICATING HYBRID BONDED STRUCTURE May 25, 2024 Pending
Array ( [id] => 19468372 [patent_doc_number] => 20240322042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR DEVICE INTEGRATING BACKSIDE POWER GRID AND RELATED INTEGRATED CIRCUIT AND FABRICATION METHOD [patent_app_type] => utility [patent_app_number] => 18/672052 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14461 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672052 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/672052
SEMICONDUCTOR DEVICE INTEGRATING BACKSIDE POWER GRID AND RELATED INTEGRATED CIRCUIT AND FABRICATION METHOD May 22, 2024 Pending
Array ( [id] => 19619316 [patent_doc_number] => 20240404996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => PACKAGE WITH VERTICALLY STACKED DEVICES, AND FABRICATION METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/673165 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673165 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/673165
PACKAGE WITH VERTICALLY STACKED DEVICES, AND FABRICATION METHODS THEREOF May 22, 2024 Pending
Array ( [id] => 19758098 [patent_doc_number] => 20250046663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/667258 [patent_app_country] => US [patent_app_date] => 2024-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18667258 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/667258
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE May 16, 2024 Pending
Array ( [id] => 20251081 [patent_doc_number] => 20250299950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/664324 [patent_app_country] => US [patent_app_date] => 2024-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18664324 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/664324
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF May 14, 2024 Pending
Array ( [id] => 20354883 [patent_doc_number] => 20250351735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/660264 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1182 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660264 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660264
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME May 9, 2024 Pending
Array ( [id] => 19751792 [patent_doc_number] => 20250040357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/655450 [patent_app_country] => US [patent_app_date] => 2024-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655450 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/655450
DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF May 5, 2024 Pending
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