
Fazli Erdem
Examiner (ID: 9525)
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2812, 2826 |
| Total Applications | 1655 |
| Issued Applications | 1358 |
| Pending Applications | 127 |
| Abandoned Applications | 215 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19399675
[patent_doc_number] => 12074061
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-27
[patent_title] => Field effect transistor with multi-metal gate via and method
[patent_app_type] => utility
[patent_app_number] => 17/407083
[patent_app_country] => US
[patent_app_date] => 2021-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 45
[patent_figures_cnt] => 54
[patent_no_of_words] => 14666
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17407083
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/407083 | Field effect transistor with multi-metal gate via and method | Aug 18, 2021 | Issued |
Array
(
[id] => 19294711
[patent_doc_number] => 12034076
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-09
[patent_title] => Semiconductor device integrating backside power grid and related integrated circuit and fabrication method
[patent_app_type] => utility
[patent_app_number] => 17/406884
[patent_app_country] => US
[patent_app_date] => 2021-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 14443
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406884
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/406884 | Semiconductor device integrating backside power grid and related integrated circuit and fabrication method | Aug 18, 2021 | Issued |
Array
(
[id] => 18212962
[patent_doc_number] => 20230059226
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-23
[patent_title] => LATERALLY-DIFFUSED METAL-OXIDE-SEMICONDUCTOR DEVICES WITH A MULTIPLE-THICKNESS BUFFER DIELECTRIC LAYER
[patent_app_type] => utility
[patent_app_number] => 17/404165
[patent_app_country] => US
[patent_app_date] => 2021-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5524
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404165
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/404165 | Laterally-diffused metal-oxide-semiconductor devices with a multiple-thickness buffer dielectric layer | Aug 16, 2021 | Issued |
Array
(
[id] => 17631411
[patent_doc_number] => 20220166426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-26
[patent_title] => Load Switch Including Back-to-Back Connected Transistors
[patent_app_type] => utility
[patent_app_number] => 17/404284
[patent_app_country] => US
[patent_app_date] => 2021-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10837
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404284
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/404284 | Load switch including back-to-back connected transistors | Aug 16, 2021 | Issued |
Array
(
[id] => 18194061
[patent_doc_number] => 20230047580
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-16
[patent_title] => HIGH VOLTAGE TRANSISTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/403578
[patent_app_country] => US
[patent_app_date] => 2021-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2858
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17403578
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/403578 | High voltage transistor structure | Aug 15, 2021 | Issued |
Array
(
[id] => 17463893
[patent_doc_number] => 20220077199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-10
[patent_title] => SEMICONDUCTOR DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/401360
[patent_app_country] => US
[patent_app_date] => 2021-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20122
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401360
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/401360 | SEMICONDUCTOR DISPLAY DEVICE | Aug 12, 2021 | Abandoned |
Array
(
[id] => 18196091
[patent_doc_number] => 20230049610
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-16
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/400671
[patent_app_country] => US
[patent_app_date] => 2021-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6735
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400671
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/400671 | Semiconductor device and method for manufacturing the same | Aug 11, 2021 | Issued |
Array
(
[id] => 19414952
[patent_doc_number] => 12080791
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-03
[patent_title] => Semiconductor memory device and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/400218
[patent_app_country] => US
[patent_app_date] => 2021-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 35
[patent_no_of_words] => 10535
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400218
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/400218 | Semiconductor memory device and method for fabricating the same | Aug 11, 2021 | Issued |
Array
(
[id] => 19739281
[patent_doc_number] => 12216109
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-04
[patent_title] => Biosensor, biosensor array and device
[patent_app_type] => utility
[patent_app_number] => 17/388630
[patent_app_country] => US
[patent_app_date] => 2021-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 13032
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17388630
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/388630 | Biosensor, biosensor array and device | Jul 28, 2021 | Issued |
Array
(
[id] => 17232255
[patent_doc_number] => 20210358812
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-18
[patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 17/388512
[patent_app_country] => US
[patent_app_date] => 2021-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7191
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17388512
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/388512 | Semiconductor integrated circuit | Jul 28, 2021 | Issued |
Array
(
[id] => 17232531
[patent_doc_number] => 20210359088
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-18
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/385974
[patent_app_country] => US
[patent_app_date] => 2021-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12968
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17385974
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/385974 | Semiconductor device | Jul 26, 2021 | Issued |
Array
(
[id] => 17631410
[patent_doc_number] => 20220166425
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-26
[patent_title] => Load Switch Including Back-to-Back Connected Transistors
[patent_app_type] => utility
[patent_app_number] => 17/382800
[patent_app_country] => US
[patent_app_date] => 2021-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6044
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382800
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/382800 | Load switch including back-to-back connected transistors | Jul 21, 2021 | Issued |
Array
(
[id] => 18563131
[patent_doc_number] => 11728386
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-15
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/375248
[patent_app_country] => US
[patent_app_date] => 2021-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6799
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375248
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/375248 | Semiconductor device | Jul 13, 2021 | Issued |
Array
(
[id] => 18857606
[patent_doc_number] => 11855203
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Power semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/367442
[patent_app_country] => US
[patent_app_date] => 2021-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 3292
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 243
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17367442
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/367442 | Power semiconductor device | Jul 4, 2021 | Issued |
Array
(
[id] => 17615680
[patent_doc_number] => 20220157960
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-19
[patent_title] => TRANSISTOR UNIT INCLUDING SHARED GATE STRUCTURE, AND SUB-WORD LINE DRIVER AND SEMICONDUCTOR DEVICE BASED ON THE SAME TRANSISTOR UNIT
[patent_app_type] => utility
[patent_app_number] => 17/361890
[patent_app_country] => US
[patent_app_date] => 2021-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11802
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361890
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/361890 | Transistor unit including shared gate structure, and sub-word line driver and semiconductor device based on the same transistor unit | Jun 28, 2021 | Issued |
Array
(
[id] => 19108696
[patent_doc_number] => 11961810
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-16
[patent_title] => Solderless interconnection structure and method of forming same
[patent_app_type] => utility
[patent_app_number] => 17/352844
[patent_app_country] => US
[patent_app_date] => 2021-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2949
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352844
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/352844 | Solderless interconnection structure and method of forming same | Jun 20, 2021 | Issued |
Array
(
[id] => 17303247
[patent_doc_number] => 20210399086
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-23
[patent_title] => HIGH PRESSURE DEVICE OF RESURF CONTAINING FERROELECTRIC MATERIAL AND METHOD OF MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/352206
[patent_app_country] => US
[patent_app_date] => 2021-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5499
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352206
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/352206 | High voltage semiconductor device comprising a combined junction terminal protection structure with a ferroelectric material and method of making the same | Jun 17, 2021 | Issued |
Array
(
[id] => 18951101
[patent_doc_number] => 11894408
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-06
[patent_title] => Dual facing BSI image sensors with wafer level stacking
[patent_app_type] => utility
[patent_app_number] => 17/347001
[patent_app_country] => US
[patent_app_date] => 2021-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 31
[patent_no_of_words] => 7471
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347001
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/347001 | Dual facing BSI image sensors with wafer level stacking | Jun 13, 2021 | Issued |
Array
(
[id] => 17100211
[patent_doc_number] => 20210288002
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-16
[patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/336078
[patent_app_country] => US
[patent_app_date] => 2021-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4921
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336078
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/336078 | Semiconductor device package and method of manufacturing the same | May 31, 2021 | Issued |
Array
(
[id] => 17530075
[patent_doc_number] => 11302776
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-04-12
[patent_title] => Method and manufacture of robust, high-performance devices
[patent_app_type] => utility
[patent_app_number] => 17/334935
[patent_app_country] => US
[patent_app_date] => 2021-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 17
[patent_no_of_words] => 13463
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17334935
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/334935 | Method and manufacture of robust, high-performance devices | May 30, 2021 | Issued |