Search

Fazli Erdem

Examiner (ID: 9525)

Most Active Art Unit
2826
Art Unit(s)
2812, 2826
Total Applications
1655
Issued Applications
1358
Pending Applications
127
Abandoned Applications
215

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16981549 [patent_doc_number] => 20210225786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => Integrated Devices in Semiconductor Packages and Methods of Forming Same [patent_app_type] => utility [patent_app_number] => 17/222249 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222249 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/222249
Integrated devices in semiconductor packages and methods of forming same Apr 4, 2021 Issued
Array ( [id] => 18366155 [patent_doc_number] => 20230147746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => SILICON CARBIDE JUNCTION FIELD EFFECT TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/913673 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17913673 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/913673
Silicon carbide junction field effect transistors Mar 24, 2021 Issued
Array ( [id] => 18950925 [patent_doc_number] => 11894231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Semiconductor fabrication method and structure using multiple sacrificial layers to form sidewall spacers [patent_app_type] => utility [patent_app_number] => 17/208511 [patent_app_country] => US [patent_app_date] => 2021-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 5382 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17208511 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/208511
Semiconductor fabrication method and structure using multiple sacrificial layers to form sidewall spacers Mar 21, 2021 Issued
Array ( [id] => 16936943 [patent_doc_number] => 20210202832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/204937 [patent_app_country] => US [patent_app_date] => 2021-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4015 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17204937 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/204937
Semiconductor device and manufacturing method thereof Mar 17, 2021 Issued
Array ( [id] => 18907936 [patent_doc_number] => 20240023421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => DISPLAY PANEL AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/283057 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5220 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17283057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/283057
Display panel and manufacturing method thereof Mar 15, 2021 Issued
Array ( [id] => 17085417 [patent_doc_number] => 20210280424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => METHOD FOR MANUFACTURING A SIC ELECTRONIC DEVICE WITH REDUCED HANDLING STEPS, AND SIC ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/190722 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5306 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190722 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190722
Method for manufacturing a sic electronic device with reduced handling steps, and sic electronic device Mar 2, 2021 Issued
Array ( [id] => 16951926 [patent_doc_number] => 20210210618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => Epitaxial Features Confined by Dielectric Fins and Spacers [patent_app_type] => utility [patent_app_number] => 17/189678 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8602 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189678 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/189678
Epitaxial features confined by dielectric fins and spacers Mar 1, 2021 Issued
Array ( [id] => 18088797 [patent_doc_number] => 11538936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/188315 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 9797 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17188315 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/188315
Semiconductor device Feb 28, 2021 Issued
Array ( [id] => 18670082 [patent_doc_number] => 11776994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => SiC MOSFET with reduced channel length and high V [patent_app_type] => utility [patent_app_number] => 17/177045 [patent_app_country] => US [patent_app_date] => 2021-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5207 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17177045 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/177045
SiC MOSFET with reduced channel length and high V Feb 15, 2021 Issued
Array ( [id] => 17130653 [patent_doc_number] => 20210305422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => SILLICON CARBIDE POWER MOSFET WITH ENHANCED BODY DIODE [patent_app_type] => utility [patent_app_number] => 17/174029 [patent_app_country] => US [patent_app_date] => 2021-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7017 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17174029 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/174029
SILLICON CARBIDE POWER MOSFET WITH ENHANCED BODY DIODE Feb 10, 2021 Abandoned
Array ( [id] => 17893195 [patent_doc_number] => 11456175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Method of making a silicon carbide electronic device [patent_app_type] => utility [patent_app_number] => 17/166181 [patent_app_country] => US [patent_app_date] => 2021-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6352 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17166181 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/166181
Method of making a silicon carbide electronic device Feb 2, 2021 Issued
Array ( [id] => 16850640 [patent_doc_number] => 20210151385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/159610 [patent_app_country] => US [patent_app_date] => 2021-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17159610 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/159610
Method for manufacturing semiconductor device Jan 26, 2021 Issued
Array ( [id] => 17818702 [patent_doc_number] => 11424326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/158110 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4619 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 464 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158110 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/158110
Semiconductor device Jan 25, 2021 Issued
Array ( [id] => 16889041 [patent_doc_number] => 20210175238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => FERROELECTRIC FIELD-EFFECT TRANSISTOR DEVICES HAVING A TOP GATE AND A BOTTOM GATE [patent_app_type] => utility [patent_app_number] => 17/155015 [patent_app_country] => US [patent_app_date] => 2021-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17155015 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/155015
FERROELECTRIC FIELD-EFFECT TRANSISTOR DEVICES HAVING A TOP GATE AND A BOTTOM GATE Jan 20, 2021 Abandoned
Array ( [id] => 17752928 [patent_doc_number] => 20220231133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => SHIELDING STRUCTURE FOR ULTRA-HIGH VOLTAGE SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/248240 [patent_app_country] => US [patent_app_date] => 2021-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9307 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17248240 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/248240
Shielding structure for ultra-high voltage semiconductor devices Jan 14, 2021 Issued
Array ( [id] => 17738229 [patent_doc_number] => 20220223691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => MOSFET DEVICE WITH UNDULATING CHANNEL [patent_app_type] => utility [patent_app_number] => 17/248160 [patent_app_country] => US [patent_app_date] => 2021-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4582 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17248160 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/248160
MOSFET device with undulating channel Jan 11, 2021 Issued
Array ( [id] => 17738268 [patent_doc_number] => 20220223730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => SILICON CARBIDE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/145969 [patent_app_country] => US [patent_app_date] => 2021-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17145969 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/145969
Silicon carbide semiconductor device Jan 10, 2021 Issued
Array ( [id] => 17723586 [patent_doc_number] => 20220216308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => High Voltage Semiconductor Device [patent_app_type] => utility [patent_app_number] => 17/140140 [patent_app_country] => US [patent_app_date] => 2021-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8545 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17140140 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/140140
High voltage semiconductor device Jan 3, 2021 Issued
Array ( [id] => 18735661 [patent_doc_number] => 11804402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => FinFET structure with controlled air gaps [patent_app_type] => utility [patent_app_number] => 17/136385 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 6867 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136385 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/136385
FinFET structure with controlled air gaps Dec 28, 2020 Issued
Array ( [id] => 18999278 [patent_doc_number] => 11916134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Regrowth uniformity in GaN vertical devices [patent_app_type] => utility [patent_app_number] => 17/135436 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 34 [patent_no_of_words] => 8780 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17135436 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/135436
Regrowth uniformity in GaN vertical devices Dec 27, 2020 Issued
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