
Feben Haile
Examiner (ID: 9505, Phone: (571)272-3072 , Office: P/2474 )
| Most Active Art Unit | 2474 |
| Art Unit(s) | 2416, 2616, 2663, OPA, 2474 |
| Total Applications | 534 |
| Issued Applications | 353 |
| Pending Applications | 33 |
| Abandoned Applications | 151 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7490228
[patent_doc_number] => 08030098
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-10-04
[patent_title] => 'Pre-formed conductive bumps on bonding pads'
[patent_app_type] => utility
[patent_app_number] => 12/198659
[patent_app_country] => US
[patent_app_date] => 2008-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 3411
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/030/08030098.pdf
[firstpage_image] =>[orig_patent_app_number] => 12198659
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/198659 | Pre-formed conductive bumps on bonding pads | Aug 25, 2008 | Issued |
Array
(
[id] => 8200545
[patent_doc_number] => 08187897
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-29
[patent_title] => 'Fabricating product chips and die with a feature pattern that contains information relating to the product chip'
[patent_app_type] => utility
[patent_app_number] => 12/193825
[patent_app_country] => US
[patent_app_date] => 2008-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 10240
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/187/08187897.pdf
[firstpage_image] =>[orig_patent_app_number] => 12193825
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/193825 | Fabricating product chips and die with a feature pattern that contains information relating to the product chip | Aug 18, 2008 | Issued |
Array
(
[id] => 7703378
[patent_doc_number] => 08089135
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-03
[patent_title] => 'Back-end-of-line wiring structures with integrated passive elements and design structures for a radiofrequency integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 12/182585
[patent_app_country] => US
[patent_app_date] => 2008-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8150
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/089/08089135.pdf
[firstpage_image] =>[orig_patent_app_number] => 12182585
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/182585 | Back-end-of-line wiring structures with integrated passive elements and design structures for a radiofrequency integrated circuit | Jul 29, 2008 | Issued |
Array
(
[id] => 5358122
[patent_doc_number] => 20090032916
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-05
[patent_title] => 'SEMICONDUCTOR PACKAGE APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 12/182843
[patent_app_country] => US
[patent_app_date] => 2008-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3915
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0032/20090032916.pdf
[firstpage_image] =>[orig_patent_app_number] => 12182843
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/182843 | SEMICONDUCTOR PACKAGE APPARATUS | Jul 29, 2008 | Abandoned |
Array
(
[id] => 8803525
[patent_doc_number] => 08441804
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-05-14
[patent_title] => 'Semiconductor device and method of manufacturing a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/179912
[patent_app_country] => US
[patent_app_date] => 2008-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 19
[patent_no_of_words] => 4642
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12179912
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/179912 | Semiconductor device and method of manufacturing a semiconductor device | Jul 24, 2008 | Issued |
Array
(
[id] => 5319930
[patent_doc_number] => 20090057920
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-05
[patent_title] => 'LOW-NOISE FLIP-CHIP PACKAGES AND FLIP CHIPS THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/180212
[patent_app_country] => US
[patent_app_date] => 2008-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 14125
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 13
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0057/20090057920.pdf
[firstpage_image] =>[orig_patent_app_number] => 12180212
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/180212 | Low-noise flip-chip packages and flip chips thereof | Jul 24, 2008 | Issued |
Array
(
[id] => 5353083
[patent_doc_number] => 20090184427
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-23
[patent_title] => 'FLASH MEMORY DEVICE WITH WORD LINES OF UNIFORM WIDTH AND METHOD FOR MANUFACTURING THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/179400
[patent_app_country] => US
[patent_app_date] => 2008-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 5380
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20090184427.pdf
[firstpage_image] =>[orig_patent_app_number] => 12179400
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/179400 | Flash memory device with word lines of uniform width and method for manufacturing thereof | Jul 23, 2008 | Issued |
Array
(
[id] => 4489144
[patent_doc_number] => 07884468
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-08
[patent_title] => 'Cooling systems for power semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 12/178489
[patent_app_country] => US
[patent_app_date] => 2008-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2700
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/884/07884468.pdf
[firstpage_image] =>[orig_patent_app_number] => 12178489
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/178489 | Cooling systems for power semiconductor devices | Jul 22, 2008 | Issued |
Array
(
[id] => 5518615
[patent_doc_number] => 20090026596
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-29
[patent_title] => 'LEAD FRAME, SEMICONDUCTOR PACKAGE, AND STACKED SEMICONDUCTOR PACKAGE HAVING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/178532
[patent_app_country] => US
[patent_app_date] => 2008-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4557
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0026/20090026596.pdf
[firstpage_image] =>[orig_patent_app_number] => 12178532
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/178532 | LEAD FRAME, SEMICONDUCTOR PACKAGE, AND STACKED SEMICONDUCTOR PACKAGE HAVING THE SAME | Jul 22, 2008 | Abandoned |
Array
(
[id] => 6503438
[patent_doc_number] => 20100013109
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-01-21
[patent_title] => 'FINE PITCH BOND PAD STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 12/176602
[patent_app_country] => US
[patent_app_date] => 2008-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1700
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0013/20100013109.pdf
[firstpage_image] =>[orig_patent_app_number] => 12176602
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/176602 | FINE PITCH BOND PAD STRUCTURE | Jul 20, 2008 | Abandoned |
Array
(
[id] => 6503330
[patent_doc_number] => 20100013099
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-01-21
[patent_title] => 'MECHANICALLY STABLE DIFFUSION BARRIER STACK AND METHOD FOR FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/176162
[patent_app_country] => US
[patent_app_date] => 2008-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2102
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0013/20100013099.pdf
[firstpage_image] =>[orig_patent_app_number] => 12176162
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/176162 | Mechanically stable diffusion barrier stack and method for fabricating the same | Jul 17, 2008 | Issued |
Array
(
[id] => 13527
[patent_doc_number] => 07807561
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-05
[patent_title] => 'Method for forming side wirings'
[patent_app_type] => utility
[patent_app_number] => 12/175650
[patent_app_country] => US
[patent_app_date] => 2008-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 19
[patent_no_of_words] => 4395
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/807/07807561.pdf
[firstpage_image] =>[orig_patent_app_number] => 12175650
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/175650 | Method for forming side wirings | Jul 17, 2008 | Issued |
Array
(
[id] => 5289468
[patent_doc_number] => 20090022198
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-22
[patent_title] => 'PACKAGE STRUCTURE OF COMPOUND SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/173763
[patent_app_country] => US
[patent_app_date] => 2008-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3417
[patent_no_of_claims] => 55
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0022/20090022198.pdf
[firstpage_image] =>[orig_patent_app_number] => 12173763
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/173763 | PACKAGE STRUCTURE OF COMPOUND SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF | Jul 14, 2008 | Abandoned |
Array
(
[id] => 5262384
[patent_doc_number] => 20090115069
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-07
[patent_title] => 'SEMICONDUCTOR CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/172912
[patent_app_country] => US
[patent_app_date] => 2008-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 6706
[patent_no_of_claims] => 46
[patent_no_of_ind_claims] => 8
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0115/20090115069.pdf
[firstpage_image] =>[orig_patent_app_number] => 12172912
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/172912 | SEMICONDUCTOR CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME | Jul 13, 2008 | Abandoned |
Array
(
[id] => 9113693
[patent_doc_number] => 08569872
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-29
[patent_title] => 'Integrated circuit package system with lead-frame paddle scheme for single axis partial saw isolation'
[patent_app_type] => utility
[patent_app_number] => 12/166169
[patent_app_country] => US
[patent_app_date] => 2008-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3619
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12166169
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/166169 | Integrated circuit package system with lead-frame paddle scheme for single axis partial saw isolation | Jun 30, 2008 | Issued |
Array
(
[id] => 233174
[patent_doc_number] => 07598602
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-06
[patent_title] => 'Controlling warping in integrated circuit devices'
[patent_app_type] => utility
[patent_app_number] => 12/163453
[patent_app_country] => US
[patent_app_date] => 2008-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 4379
[patent_no_of_claims] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/598/07598602.pdf
[firstpage_image] =>[orig_patent_app_number] => 12163453
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/163453 | Controlling warping in integrated circuit devices | Jun 26, 2008 | Issued |
Array
(
[id] => 5461701
[patent_doc_number] => 20090321901
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-31
[patent_title] => 'THERMALLY BALANCED HEAT SINKS'
[patent_app_type] => utility
[patent_app_number] => 12/146384
[patent_app_country] => US
[patent_app_date] => 2008-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 3573
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0321/20090321901.pdf
[firstpage_image] =>[orig_patent_app_number] => 12146384
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/146384 | THERMALLY BALANCED HEAT SINKS | Jun 24, 2008 | Abandoned |
Array
(
[id] => 8910052
[patent_doc_number] => 08482119
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-09
[patent_title] => 'Semiconductor chip assembly'
[patent_app_type] => utility
[patent_app_number] => 12/213754
[patent_app_country] => US
[patent_app_date] => 2008-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3593
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12213754
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/213754 | Semiconductor chip assembly | Jun 23, 2008 | Issued |
Array
(
[id] => 5499377
[patent_doc_number] => 20090160065
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-25
[patent_title] => 'Reconstituted Wafer Level Stacking'
[patent_app_type] => utility
[patent_app_number] => 12/143743
[patent_app_country] => US
[patent_app_date] => 2008-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 6671
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0160/20090160065.pdf
[firstpage_image] =>[orig_patent_app_number] => 12143743
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/143743 | Reconstituted wafer level stacking | Jun 19, 2008 | Issued |
Array
(
[id] => 4629310
[patent_doc_number] => 08008196
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-30
[patent_title] => 'Method to create a metal pattern using a damascene-like process'
[patent_app_type] => utility
[patent_app_number] => 12/139969
[patent_app_country] => US
[patent_app_date] => 2008-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 13
[patent_no_of_words] => 5991
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/008/08008196.pdf
[firstpage_image] =>[orig_patent_app_number] => 12139969
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/139969 | Method to create a metal pattern using a damascene-like process | Jun 15, 2008 | Issued |