Feben Haile

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Array ( [id] => 4433593 [patent_doc_number] => 07969014 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-28 [patent_title] => 'Power layout of integrated circuits and designing method thereof' [patent_app_type] => utility [patent_app_number] => 12/129390 [patent_app_country] => US [patent_app_date] => 2008-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2644 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/969/07969014.pdf [firstpage_image] =>[orig_patent_app_number] => 12129390 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 5555661 [patent_doc_number] => 20090267238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-29 [patent_title] => 'BRIDGES FOR INTERCONNECTING INTERPOSERS IN MULTI-CHIP INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 12/110579 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4482 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20090267238.pdf [firstpage_image] =>[orig_patent_app_number] => 12110579 [rel_patent_id] =>[rel_patent_doc_number] =>)

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