Search

Feben Haile

Examiner (ID: 9505, Phone: (571)272-3072 , Office: P/2474 )

Most Active Art Unit
2474
Art Unit(s)
2416, 2616, 2663, OPA, 2474
Total Applications
534
Issued Applications
353
Pending Applications
33
Abandoned Applications
151

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4833454 [patent_doc_number] => 20080132001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'Electronic part and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/011918 [patent_app_country] => US [patent_app_date] => 2008-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5954 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20080132001.pdf [firstpage_image] =>[orig_patent_app_number] => 12011918 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/011918
Electronic part and method for manufacturing the same Jan 29, 2008 Issued
Array ( [id] => 103111 [patent_doc_number] => 07728412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'Semiconductor device having plurality of leads' [patent_app_type] => utility [patent_app_number] => 12/014313 [patent_app_country] => US [patent_app_date] => 2008-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 31 [patent_no_of_words] => 9130 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/728/07728412.pdf [firstpage_image] =>[orig_patent_app_number] => 12014313 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/014313
Semiconductor device having plurality of leads Jan 14, 2008 Issued
Array ( [id] => 4965359 [patent_doc_number] => 20080108179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'STACKABLE MOLDED PACKAGES AND METHODS OF MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/968873 [patent_app_country] => US [patent_app_date] => 2008-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3608 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20080108179.pdf [firstpage_image] =>[orig_patent_app_number] => 11968873 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/968873
STACKABLE MOLDED PACKAGES AND METHODS OF MAKING THE SAME Jan 2, 2008 Abandoned
Array ( [id] => 5435655 [patent_doc_number] => 20090170242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'System-in-Package Having Integrated Passive Devices and Method Therefor' [patent_app_type] => utility [patent_app_number] => 11/964529 [patent_app_country] => US [patent_app_date] => 2007-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4803 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20090170242.pdf [firstpage_image] =>[orig_patent_app_number] => 11964529 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/964529
System-in-package having integrated passive devices and method therefor Dec 25, 2007 Issued
Array ( [id] => 5542830 [patent_doc_number] => 20090152707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'METHODS AND SYSTEMS FOR PACKAGING INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 11/958288 [patent_app_country] => US [patent_app_date] => 2007-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3986 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20090152707.pdf [firstpage_image] =>[orig_patent_app_number] => 11958288 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/958288
Methods and systems for packaging integrated circuits Dec 16, 2007 Issued
Array ( [id] => 5545675 [patent_doc_number] => 20090155552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'IC CHIP PACKAGE SUBSTRATE HAVING OUTERMOST GLASS FIBER REINFORCED EPOXY LAYERS AND RELATED METHOD' [patent_app_type] => utility [patent_app_number] => 11/956619 [patent_app_country] => US [patent_app_date] => 2007-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1851 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20090155552.pdf [firstpage_image] =>[orig_patent_app_number] => 11956619 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/956619
IC CHIP PACKAGE SUBSTRATE HAVING OUTERMOST GLASS FIBER REINFORCED EPOXY LAYERS AND RELATED METHOD Dec 13, 2007 Abandoned
Array ( [id] => 6563437 [patent_doc_number] => 20100059889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-11 [patent_title] => 'ADHESION OF DIFFUSION BARRIER ON COPPER-CONTAINING INTERCONNECT ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/520189 [patent_app_country] => US [patent_app_date] => 2007-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4378 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20100059889.pdf [firstpage_image] =>[orig_patent_app_number] => 12520189 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/520189
ADHESION OF DIFFUSION BARRIER ON COPPER-CONTAINING INTERCONNECT ELEMENT Dec 6, 2007 Abandoned
Array ( [id] => 5419780 [patent_doc_number] => 20090146234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'MICROELECTRONIC IMAGING UNITS HAVING AN INFRARED-ABSORBING LAYER AND ASSOCIATED SYSTEMS AND METHODS' [patent_app_type] => utility [patent_app_number] => 11/951528 [patent_app_country] => US [patent_app_date] => 2007-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3696 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20090146234.pdf [firstpage_image] =>[orig_patent_app_number] => 11951528 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/951528
MICROELECTRONIC IMAGING UNITS HAVING AN INFRARED-ABSORBING LAYER AND ASSOCIATED SYSTEMS AND METHODS Dec 5, 2007 Abandoned
Array ( [id] => 4743426 [patent_doc_number] => 20080088027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'DRY ETCHBACK OF INTERCONNECT CONTACTS' [patent_app_type] => utility [patent_app_number] => 11/946922 [patent_app_country] => US [patent_app_date] => 2007-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2319 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20080088027.pdf [firstpage_image] =>[orig_patent_app_number] => 11946922 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/946922
Dry etchback of interconnect contacts Nov 28, 2007 Issued
Array ( [id] => 32415 [patent_doc_number] => 07790515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-07 [patent_title] => 'Semiconductor device with no base member and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/986698 [patent_app_country] => US [patent_app_date] => 2007-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5195 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/790/07790515.pdf [firstpage_image] =>[orig_patent_app_number] => 11986698 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/986698
Semiconductor device with no base member and method of manufacturing the same Nov 25, 2007 Issued
Array ( [id] => 7597260 [patent_doc_number] => 07619317 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-17 [patent_title] => 'Carrier structure for semiconductor chip and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/984349 [patent_app_country] => US [patent_app_date] => 2007-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 33 [patent_no_of_words] => 4457 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/619/07619317.pdf [firstpage_image] =>[orig_patent_app_number] => 11984349 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/984349
Carrier structure for semiconductor chip and method for manufacturing the same Nov 15, 2007 Issued
Array ( [id] => 4963049 [patent_doc_number] => 20080105869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'PRINTED CIRCUIT BOARD FOR MOUNTING SEMICONDUCTOR DEVICE PACKAGE, AND METHOD OF TESTING AND FABRICATING SEMICONDUCTOR DEVICE PACKAGE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/935119 [patent_app_country] => US [patent_app_date] => 2007-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5416 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20080105869.pdf [firstpage_image] =>[orig_patent_app_number] => 11935119 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935119
PRINTED CIRCUIT BOARD FOR MOUNTING SEMICONDUCTOR DEVICE PACKAGE, AND METHOD OF TESTING AND FABRICATING SEMICONDUCTOR DEVICE PACKAGE USING THE SAME Nov 4, 2007 Abandoned
Array ( [id] => 4503715 [patent_doc_number] => 07919853 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-04-05 [patent_title] => 'Semiconductor package and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 11/933908 [patent_app_country] => US [patent_app_date] => 2007-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 4496 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/919/07919853.pdf [firstpage_image] =>[orig_patent_app_number] => 11933908 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/933908
Semiconductor package and fabrication method thereof Oct 31, 2007 Issued
Array ( [id] => 4477322 [patent_doc_number] => 07868455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Solving via-misalignment issues in interconnect structures having air-gaps' [patent_app_type] => utility [patent_app_number] => 11/933929 [patent_app_country] => US [patent_app_date] => 2007-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3621 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/868/07868455.pdf [firstpage_image] =>[orig_patent_app_number] => 11933929 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/933929
Solving via-misalignment issues in interconnect structures having air-gaps Oct 31, 2007 Issued
Array ( [id] => 8202975 [patent_doc_number] => 08188586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Mountable integrated circuit package system with mounting interconnects' [patent_app_type] => utility [patent_app_number] => 11/934069 [patent_app_country] => US [patent_app_date] => 2007-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4889 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/188/08188586.pdf [firstpage_image] =>[orig_patent_app_number] => 11934069 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/934069
Mountable integrated circuit package system with mounting interconnects Oct 31, 2007 Issued
Array ( [id] => 5262375 [patent_doc_number] => 20090115060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'INTEGRATED CIRCUIT DEVICE AND METHOD' [patent_app_type] => utility [patent_app_number] => 11/933459 [patent_app_country] => US [patent_app_date] => 2007-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1489 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20090115060.pdf [firstpage_image] =>[orig_patent_app_number] => 11933459 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/933459
INTEGRATED CIRCUIT DEVICE AND METHOD Oct 31, 2007 Abandoned
Array ( [id] => 4749280 [patent_doc_number] => 20080157351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'SEMICONDUCTOR DEVICE FABRICATING METHOD' [patent_app_type] => utility [patent_app_number] => 11/928939 [patent_app_country] => US [patent_app_date] => 2007-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20080157351.pdf [firstpage_image] =>[orig_patent_app_number] => 11928939 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/928939
SEMICONDUCTOR DEVICE FABRICATING METHOD Oct 29, 2007 Abandoned
Array ( [id] => 4768825 [patent_doc_number] => 20080054481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'Semiconductor Structure Formed Using a Sacrificial Structure' [patent_app_type] => utility [patent_app_number] => 11/927978 [patent_app_country] => US [patent_app_date] => 2007-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3278 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20080054481.pdf [firstpage_image] =>[orig_patent_app_number] => 11927978 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/927978
Semiconductor structure formed using a sacrificial structure Oct 29, 2007 Issued
Array ( [id] => 4538250 [patent_doc_number] => 07888782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-15 [patent_title] => 'Apparatus and method configured to lower thermal stresses' [patent_app_type] => utility [patent_app_number] => 11/925268 [patent_app_country] => US [patent_app_date] => 2007-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3768 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/888/07888782.pdf [firstpage_image] =>[orig_patent_app_number] => 11925268 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/925268
Apparatus and method configured to lower thermal stresses Oct 25, 2007 Issued
Array ( [id] => 34746 [patent_doc_number] => 07786590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-31 [patent_title] => 'Semiconductor package with improved size, reliability, warpage prevention, and heat dissipation and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/924689 [patent_app_country] => US [patent_app_date] => 2007-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5404 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/786/07786590.pdf [firstpage_image] =>[orig_patent_app_number] => 11924689 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/924689
Semiconductor package with improved size, reliability, warpage prevention, and heat dissipation and method for manufacturing the same Oct 25, 2007 Issued
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