
Fernando N. Hidalgo
Examiner (ID: 12957, Phone: (571)270-3306 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2827 |
| Total Applications | 1613 |
| Issued Applications | 1483 |
| Pending Applications | 81 |
| Abandoned Applications | 91 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18608186
[patent_doc_number] => 11749664
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-05
[patent_title] => Memory circuits
[patent_app_type] => utility
[patent_app_number] => 17/811903
[patent_app_country] => US
[patent_app_date] => 2022-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8353
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17811903
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/811903 | Memory circuits | Jul 11, 2022 | Issued |
Array
(
[id] => 19670946
[patent_doc_number] => 12183717
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-31
[patent_title] => System and method for stacking compression attached memory modules
[patent_app_type] => utility
[patent_app_number] => 17/863205
[patent_app_country] => US
[patent_app_date] => 2022-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 11314
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17863205
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/863205 | System and method for stacking compression attached memory modules | Jul 11, 2022 | Issued |
Array
(
[id] => 19328621
[patent_doc_number] => 12046310
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-23
[patent_title] => Semiconductor device structure
[patent_app_type] => utility
[patent_app_number] => 17/859873
[patent_app_country] => US
[patent_app_date] => 2022-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 14635
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17859873
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/859873 | Semiconductor device structure | Jul 6, 2022 | Issued |
Array
(
[id] => 18703729
[patent_doc_number] => 11790243
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-10-17
[patent_title] => Ferroelectric field effect transistor for implementation of decision tree
[patent_app_type] => utility
[patent_app_number] => 17/809951
[patent_app_country] => US
[patent_app_date] => 2022-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 5987
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809951
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/809951 | Ferroelectric field effect transistor for implementation of decision tree | Jun 29, 2022 | Issued |
Array
(
[id] => 19567564
[patent_doc_number] => 12142341
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-12
[patent_title] => System and method for providing compression attached memory module compression connectors
[patent_app_type] => utility
[patent_app_number] => 17/855291
[patent_app_country] => US
[patent_app_date] => 2022-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 11262
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855291
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/855291 | System and method for providing compression attached memory module compression connectors | Jun 29, 2022 | Issued |
Array
(
[id] => 18882631
[patent_doc_number] => 20240006000
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-04
[patent_title] => NONVOLATILE MEMORY WITH SELF-TRACKING IREF
[patent_app_type] => utility
[patent_app_number] => 17/854407
[patent_app_country] => US
[patent_app_date] => 2022-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8052
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854407
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/854407 | NONVOLATILE MEMORY WITH SELF-TRACKING IREF | Jun 29, 2022 | Pending |
Array
(
[id] => 18859174
[patent_doc_number] => 11856784
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Analog non-volatile memory device using poly ferroelectric film with random polarization directions
[patent_app_type] => utility
[patent_app_number] => 17/852818
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 12610
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852818
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/852818 | Analog non-volatile memory device using poly ferroelectric film with random polarization directions | Jun 28, 2022 | Issued |
Array
(
[id] => 19198901
[patent_doc_number] => 11996149
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-05-28
[patent_title] => Access command delay using delay locked loop (DLL) circuitry
[patent_app_type] => utility
[patent_app_number] => 17/853563
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7928
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853563
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/853563 | Access command delay using delay locked loop (DLL) circuitry | Jun 28, 2022 | Issued |
Array
(
[id] => 18081187
[patent_doc_number] => 20220406799
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-22
[patent_title] => PLATE NODE CONFIGURATIONS AND OPERATIONS FOR A MEMORY ARRAY
[patent_app_type] => utility
[patent_app_number] => 17/851522
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18744
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17851522
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/851522 | PLATE NODE CONFIGURATIONS AND OPERATIONS FOR A MEMORY ARRAY | Jun 27, 2022 | Abandoned |
Array
(
[id] => 18839271
[patent_doc_number] => 11847345
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-19
[patent_title] => Memory circuit including an array control inhibitor
[patent_app_type] => utility
[patent_app_number] => 17/851109
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5195
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17851109
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/851109 | Memory circuit including an array control inhibitor | Jun 27, 2022 | Issued |
Array
(
[id] => 17932970
[patent_doc_number] => 20220328096
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => MEMORY COMPUTATION CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 17/808536
[patent_app_country] => US
[patent_app_date] => 2022-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13102
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17808536
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/808536 | Memory computation circuit | Jun 22, 2022 | Issued |
Array
(
[id] => 19427970
[patent_doc_number] => 12087398
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-10
[patent_title] => Wordline driver circuit and memory
[patent_app_type] => utility
[patent_app_number] => 17/844048
[patent_app_country] => US
[patent_app_date] => 2022-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 5928
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 314
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17844048
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/844048 | Wordline driver circuit and memory | Jun 18, 2022 | Issued |
Array
(
[id] => 19137861
[patent_doc_number] => 11972832
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-30
[patent_title] => Command decoder circuit, memory, and electronic device
[patent_app_type] => utility
[patent_app_number] => 17/843261
[patent_app_country] => US
[patent_app_date] => 2022-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 6424
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843261
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/843261 | Command decoder circuit, memory, and electronic device | Jun 16, 2022 | Issued |
Array
(
[id] => 18722101
[patent_doc_number] => 11799463
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-24
[patent_title] => Duty adjustment circuit, and delay locked loop circuit and semiconductor memory device including the same
[patent_app_type] => utility
[patent_app_number] => 17/842881
[patent_app_country] => US
[patent_app_date] => 2022-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 18
[patent_no_of_words] => 9647
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842881
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/842881 | Duty adjustment circuit, and delay locked loop circuit and semiconductor memory device including the same | Jun 16, 2022 | Issued |
Array
(
[id] => 18623593
[patent_doc_number] => 11756647
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-12
[patent_title] => Memory device and electronic device
[patent_app_type] => utility
[patent_app_number] => 17/843591
[patent_app_country] => US
[patent_app_date] => 2022-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 8311
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843591
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/843591 | Memory device and electronic device | Jun 16, 2022 | Issued |
Array
(
[id] => 18189227
[patent_doc_number] => 11579812
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-14
[patent_title] => Local data compaction for integrated memory assembly
[patent_app_type] => utility
[patent_app_number] => 17/837858
[patent_app_country] => US
[patent_app_date] => 2022-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 31
[patent_no_of_words] => 22845
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837858
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/837858 | Local data compaction for integrated memory assembly | Jun 9, 2022 | Issued |
Array
(
[id] => 18528532
[patent_doc_number] => 11715530
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-01
[patent_title] => Offset memory component automatic calibration (autocal) error recovery for a memory sub-system
[patent_app_type] => utility
[patent_app_number] => 17/837816
[patent_app_country] => US
[patent_app_date] => 2022-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 9990
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837816
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/837816 | Offset memory component automatic calibration (autocal) error recovery for a memory sub-system | Jun 9, 2022 | Issued |
Array
(
[id] => 17886621
[patent_doc_number] => 20220302099
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-22
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/832993
[patent_app_country] => US
[patent_app_date] => 2022-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11897
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17832993
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/832993 | Semiconductor memory device and manufacturing method of semiconductor memory device | Jun 5, 2022 | Issued |
Array
(
[id] => 19444250
[patent_doc_number] => 12094536
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-17
[patent_title] => Memory device and program operation method thereof
[patent_app_type] => utility
[patent_app_number] => 17/833013
[patent_app_country] => US
[patent_app_date] => 2022-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 17
[patent_no_of_words] => 14116
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17833013
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/833013 | Memory device and program operation method thereof | Jun 5, 2022 | Issued |
Array
(
[id] => 17869134
[patent_doc_number] => 20220291871
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-15
[patent_title] => NONVOLATILE MEMORY DEVICE SUPPORTING HIGH-EFFICIENCY I/O INTERFACE
[patent_app_type] => utility
[patent_app_number] => 17/828176
[patent_app_country] => US
[patent_app_date] => 2022-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23070
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17828176
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/828176 | Nonvolatile memory device supporting high-efficiency I/O interface | May 30, 2022 | Issued |