Search

Fernando N. Hidalgo

Examiner (ID: 3898, Phone: (571)270-3306 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
1647
Issued Applications
1497
Pending Applications
94
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17269299 [patent_doc_number] => 11194726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Stacked memory dice for combined access operations [patent_app_type] => utility [patent_app_number] => 16/778151 [patent_app_country] => US [patent_app_date] => 2020-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 22877 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16778151 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/778151
Stacked memory dice for combined access operations Jan 30, 2020 Issued
Array ( [id] => 16479303 [patent_doc_number] => 10854256 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Storage element and storage apparatus [patent_app_type] => utility [patent_app_number] => 16/777222 [patent_app_country] => US [patent_app_date] => 2020-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11021 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16777222 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/777222
Storage element and storage apparatus Jan 29, 2020 Issued
Array ( [id] => 16834963 [patent_doc_number] => 11011221 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-18 [patent_title] => Apparatuses and methods for signal line buffer timing control [patent_app_type] => utility [patent_app_number] => 16/777650 [patent_app_country] => US [patent_app_date] => 2020-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6798 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16777650 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/777650
Apparatuses and methods for signal line buffer timing control Jan 29, 2020 Issued
Array ( [id] => 17009219 [patent_doc_number] => 20210240380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => METHOD AND APPARATUS FOR PERFORMING AN ERASE OPERATION COMPRISING A SEQUENCE OF MICRO-PULSES IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/777812 [patent_app_country] => US [patent_app_date] => 2020-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7005 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16777812 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/777812
Method and apparatus for performing an erase operation comprising a sequence of micro-pulses in a memory device Jan 29, 2020 Issued
Array ( [id] => 16653162 [patent_doc_number] => 10930353 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-23 [patent_title] => Non-volatile memory device and operating method of the same [patent_app_type] => utility [patent_app_number] => 16/775424 [patent_app_country] => US [patent_app_date] => 2020-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10749 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16775424 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/775424
Non-volatile memory device and operating method of the same Jan 28, 2020 Issued
Array ( [id] => 16801913 [patent_doc_number] => 10996856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Hardware-supported 3D-stacked NVM data compression method and system thereof [patent_app_type] => utility [patent_app_number] => 16/750655 [patent_app_country] => US [patent_app_date] => 2020-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8330 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16750655 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/750655
Hardware-supported 3D-stacked NVM data compression method and system thereof Jan 22, 2020 Issued
Array ( [id] => 16803078 [patent_doc_number] => 10998029 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Low voltage ferroelectric memory cell sensing [patent_app_type] => utility [patent_app_number] => 16/746626 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14308 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16746626 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/746626
Low voltage ferroelectric memory cell sensing Jan 16, 2020 Issued
Array ( [id] => 16543433 [patent_doc_number] => 20200409848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => CONTROLLER, MEMORY SYSTEM, AND OPERATING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 16/745874 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6497 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16745874 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/745874
CONTROLLER, MEMORY SYSTEM, AND OPERATING METHODS THEREOF Jan 16, 2020 Abandoned
Array ( [id] => 16803067 [patent_doc_number] => 10998018 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Apparatus and methods for compensating for variations in fabrication process of component(s) in a memory [patent_app_type] => utility [patent_app_number] => 16/746378 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6071 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16746378 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/746378
Apparatus and methods for compensating for variations in fabrication process of component(s) in a memory Jan 16, 2020 Issued
Array ( [id] => 16536652 [patent_doc_number] => 10879266 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-29 [patent_title] => Semiconductor device and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/744592 [patent_app_country] => US [patent_app_date] => 2020-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4493 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744592 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744592
Semiconductor device and operating method thereof Jan 15, 2020 Issued
Array ( [id] => 16803096 [patent_doc_number] => 10998047 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Methods and systems for an analog CAM with fuzzy search [patent_app_type] => utility [patent_app_number] => 16/744136 [patent_app_country] => US [patent_app_date] => 2020-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 6813 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744136 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744136
Methods and systems for an analog CAM with fuzzy search Jan 14, 2020 Issued
Array ( [id] => 16345183 [patent_doc_number] => 20200309833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => TEST APPARATUS [patent_app_type] => utility [patent_app_number] => 16/742181 [patent_app_country] => US [patent_app_date] => 2020-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742181 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/742181
Test apparatus Jan 13, 2020 Issued
Array ( [id] => 15872943 [patent_doc_number] => 20200143875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => Write Assist for a Memory Device and Methods of Forming the Same [patent_app_type] => utility [patent_app_number] => 16/734651 [patent_app_country] => US [patent_app_date] => 2020-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16734651 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/734651
Write assist for a memory device and methods of forming the same Jan 5, 2020 Issued
Array ( [id] => 16677552 [patent_doc_number] => 20210066318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => Analog Non-Volatile Memory Device Using Poly Ferrorelectric Film with Random Polarization Directions [patent_app_type] => utility [patent_app_number] => 16/733029 [patent_app_country] => US [patent_app_date] => 2020-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12582 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16733029 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/733029
Analog non-volatile memory device using poly ferroelectric film with random polarization directions Jan 1, 2020 Issued
Array ( [id] => 17566714 [patent_doc_number] => 20220130863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => FERROELECTRIC MATERIAL-BASED THREE-DIMENSIONAL FLASH MEMORY, AND MANUFACTURE THEREOF [patent_app_type] => utility [patent_app_number] => 17/422801 [patent_app_country] => US [patent_app_date] => 2019-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17422801 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/422801
Ferroelectric material-based three-dimensional flash memory, and manufacture thereof Dec 25, 2019 Issued
Array ( [id] => 17165969 [patent_doc_number] => 11152077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Transmitting data and power to a memory sub-system for memory device testing [patent_app_type] => utility [patent_app_number] => 16/719698 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9570 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16719698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/719698
Transmitting data and power to a memory sub-system for memory device testing Dec 17, 2019 Issued
Array ( [id] => 16819698 [patent_doc_number] => 11004535 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-11 [patent_title] => Robust storage of bad column data and parity bits on word line [patent_app_type] => utility [patent_app_number] => 16/717494 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 16432 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16717494 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/717494
Robust storage of bad column data and parity bits on word line Dec 16, 2019 Issued
Array ( [id] => 16495513 [patent_doc_number] => 10861560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/718032 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9424 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16718032 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/718032
Semiconductor memory device Dec 16, 2019 Issued
Array ( [id] => 16904524 [patent_doc_number] => 20210183440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => DISCHARGE CURRENT MITIGATION IN A MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 16/717944 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16717944 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/717944
Discharge current mitigation in a memory array Dec 16, 2019 Issued
Array ( [id] => 17379711 [patent_doc_number] => 11237726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Memory system performance enhancements using measured signal and noise characteristics of memory cells [patent_app_type] => utility [patent_app_number] => 16/714463 [patent_app_country] => US [patent_app_date] => 2019-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9259 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714463 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/714463
Memory system performance enhancements using measured signal and noise characteristics of memory cells Dec 12, 2019 Issued
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