Search

Fernando N. Hidalgo

Examiner (ID: 3898, Phone: (571)270-3306 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827
Total Applications
1647
Issued Applications
1497
Pending Applications
94
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15348089 [patent_doc_number] => 20200011936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => PRIMARY ALKALINE BATTERY WITH INTEGRATED IN-CELL RESISTANCES [patent_app_type] => utility [patent_app_number] => 16/573987 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10344 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573987 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573987
PRIMARY ALKALINE BATTERY WITH INTEGRATED IN-CELL RESISTANCES Sep 16, 2019 Abandoned
Array ( [id] => 16536242 [patent_doc_number] => 10878855 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-29 [patent_title] => Low cell voltage (LCV) memory write assist [patent_app_type] => utility [patent_app_number] => 16/573416 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4425 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573416 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573416
Low cell voltage (LCV) memory write assist Sep 16, 2019 Issued
Array ( [id] => 15331107 [patent_doc_number] => 20200005883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => SIMULTANEOUS SCAN CHAIN INITIALIZATION WITH DISPARATE LATCHES [patent_app_type] => utility [patent_app_number] => 16/567309 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7977 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567309 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567309
Simultaneous scan chain initialization with disparate latches Sep 10, 2019 Issued
Array ( [id] => 15533863 [patent_doc_number] => 20200059237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => ELECTRONIC DEVICE WITH A TIMING ADJUSTMENT MECHANISM [patent_app_type] => utility [patent_app_number] => 16/566703 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8329 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16566703 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/566703
Electronic device with a timing adjustment mechanism Sep 9, 2019 Issued
Array ( [id] => 16463874 [patent_doc_number] => 10847231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Memory system with adaptive read-threshold scheme and method of operating such memory system [patent_app_type] => utility [patent_app_number] => 16/557349 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5718 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557349 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557349
Memory system with adaptive read-threshold scheme and method of operating such memory system Aug 29, 2019 Issued
Array ( [id] => 16818539 [patent_doc_number] => 11003365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Methods and related devices for operating a memory array [patent_app_type] => utility [patent_app_number] => 16/555546 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5800 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16555546 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/555546
Methods and related devices for operating a memory array Aug 28, 2019 Issued
Array ( [id] => 16463879 [patent_doc_number] => 10847236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Memory cell with a sensing control circuit [patent_app_type] => utility [patent_app_number] => 16/554646 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4997 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16554646 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/554646
Memory cell with a sensing control circuit Aug 28, 2019 Issued
Array ( [id] => 16677015 [patent_doc_number] => 20210065781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => PERFORMING A REFRESH OPERATION BASED ON SYSTEM CHARACTERISTICS [patent_app_type] => utility [patent_app_number] => 16/554026 [patent_app_country] => US [patent_app_date] => 2019-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10043 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16554026 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/554026
Performing a refresh operation based on system characteristics Aug 27, 2019 Issued
Array ( [id] => 17500437 [patent_doc_number] => 11289146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Word line timing management [patent_app_type] => utility [patent_app_number] => 16/552984 [patent_app_country] => US [patent_app_date] => 2019-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 21394 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16552984 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/552984
Word line timing management Aug 26, 2019 Issued
Array ( [id] => 16080201 [patent_doc_number] => 20200194087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/552828 [patent_app_country] => US [patent_app_date] => 2019-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16552828 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/552828
Semiconductor memory device Aug 26, 2019 Issued
Array ( [id] => 16339055 [patent_doc_number] => 10790022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Adaptive high voltage circuitry and methods for programming operations in an analog neural memory array in a deep learning artificial neural network [patent_app_type] => utility [patent_app_number] => 16/550254 [patent_app_country] => US [patent_app_date] => 2019-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 42 [patent_no_of_words] => 8469 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550254 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550254
Adaptive high voltage circuitry and methods for programming operations in an analog neural memory array in a deep learning artificial neural network Aug 24, 2019 Issued
Array ( [id] => 16684172 [patent_doc_number] => 10943661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Current compensation block and method for programming analog neural memory in deep learning artificial neural network [patent_app_type] => utility [patent_app_number] => 16/550253 [patent_app_country] => US [patent_app_date] => 2019-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 42 [patent_no_of_words] => 8468 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550253 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550253
Current compensation block and method for programming analog neural memory in deep learning artificial neural network Aug 24, 2019 Issued
Array ( [id] => 15502893 [patent_doc_number] => 20200051635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => ADJUSTABLE CURRENT SINK TO DRAW COMPENSATION CURRENT FROM HIGH VOLTAGE GENERATION CIRCUITRY DURING PROGRAMMING OPERATION OF ANALOG NEURAL MEMORY IN DEEP LEARNING ARTIFICIAL NEURAL NETWORK [patent_app_type] => utility [patent_app_number] => 16/550248 [patent_app_country] => US [patent_app_date] => 2019-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550248 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550248
Adjustable current sink to draw compensation current from high voltage generation circuitry during programming operation of analog neural memory in deep learning artificial neural network Aug 24, 2019 Issued
Array ( [id] => 16447976 [patent_doc_number] => 10839907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Dynamic modification of programming duration based on number of cells to be programmed in analog neural memory array in deep learning artificial neural network [patent_app_type] => utility [patent_app_number] => 16/550223 [patent_app_country] => US [patent_app_date] => 2019-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 42 [patent_no_of_words] => 8463 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550223 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550223
Dynamic modification of programming duration based on number of cells to be programmed in analog neural memory array in deep learning artificial neural network Aug 23, 2019 Issued
Array ( [id] => 16332008 [patent_doc_number] => 20200302974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/549788 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549788 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/549788
Semiconductor storage device Aug 22, 2019 Issued
Array ( [id] => 16660376 [patent_doc_number] => 20210057013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => APPARATUSES AND METHODS FOR LOSSY ROW ACCESS COUNTING [patent_app_type] => utility [patent_app_number] => 16/549942 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10559 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549942 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/549942
Apparatuses and methods for lossy row access counting Aug 22, 2019 Issued
Array ( [id] => 16637763 [patent_doc_number] => 10916277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Memory device and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/549388 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 9340 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549388 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/549388
Memory device and operating method thereof Aug 22, 2019 Issued
Array ( [id] => 15274945 [patent_doc_number] => 20190386207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => SPIN-ORBIT TORQUE TYPE MAGNETORESISTANCE EFFECT ELEMENT, AND METHOD FOR PRODUCING SPIN-ORBIT TORQUE TYPE MAGNETORESISTANCE EFFECT ELEMENT [patent_app_type] => utility [patent_app_number] => 16/547670 [patent_app_country] => US [patent_app_date] => 2019-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547670 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/547670
Spin-orbit torque type magnetoresistance effect element, and method for producing spin-orbit torque type magnetoresistance effect element Aug 21, 2019 Issued
Array ( [id] => 17238232 [patent_doc_number] => 11182110 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-23 [patent_title] => On-chip memory block circuit [patent_app_type] => utility [patent_app_number] => 16/547550 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 15018 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547550 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/547550
On-chip memory block circuit Aug 20, 2019 Issued
Array ( [id] => 15547163 [patent_doc_number] => 10573371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Systems and methods for controlling data strobe signals during read operations [patent_app_type] => utility [patent_app_number] => 16/543168 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6915 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543168 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543168
Systems and methods for controlling data strobe signals during read operations Aug 15, 2019 Issued
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