
Ferris Lander
Examiner (ID: 7708)
| Most Active Art Unit | 1103 |
| Art Unit(s) | 1108, 1303, 1802, 3307, 1103, 1209, 2899, 1754, 1306 |
| Total Applications | 1021 |
| Issued Applications | 801 |
| Pending Applications | 19 |
| Abandoned Applications | 201 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5208658
[patent_doc_number] => 20070247242
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[patent_issue_date] => 2007-10-25
[patent_title] => 'QUADRATURE VOLTAGE-CONTROLLED OSCILLATOR'
[patent_app_type] => utility
[patent_app_number] => 11/733042
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/733042 | QUADRATURE VOLTAGE-CONTROLLED OSCILLATOR | Apr 8, 2007 | Abandoned |
Array
(
[id] => 6425349
[patent_doc_number] => 20100102753
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[patent_kind] => A1
[patent_issue_date] => 2010-04-29
[patent_title] => 'Circuit Arrangement and Method for the Dimming Control of One or More Operating Device for Lamps'
[patent_app_type] => utility
[patent_app_number] => 12/529123
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/529123 | Circuit Arrangement and Method for the Dimming Control of One or More Operating Device for Lamps | Feb 27, 2007 | Abandoned |
Array
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[patent_doc_number] => 07688106
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[patent_issue_date] => 2010-03-30
[patent_title] => 'High-speed serial interface circuitry for programmable logic device integrated circuits'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/712609 | High-speed serial interface circuitry for programmable logic device integrated circuits | Feb 26, 2007 | Issued |
Array
(
[id] => 5129409
[patent_doc_number] => 20070205806
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[patent_issue_date] => 2007-09-06
[patent_title] => 'Open-drain output circuit'
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Array
(
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[patent_title] => 'Method of reducing power of a circuit'
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Array
(
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[patent_doc_number] => 20070211553
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[patent_issue_date] => 2007-09-13
[patent_title] => 'Semiconductor device reducing power consumption in standby mode'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/707317 | Assigning inputs of look-up tables to improve a design implementation in a programmable logic device | Feb 15, 2007 | Issued |
Array
(
[id] => 4871143
[patent_doc_number] => 20080197877
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[patent_issue_date] => 2008-08-21
[patent_title] => 'Per byte lane dynamic on-die termination'
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[patent_app_number] => 11/708148
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/708148 | Per byte lane dynamic on-die termination | Feb 15, 2007 | Abandoned |
Array
(
[id] => 126710
[patent_doc_number] => 07711907
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/707175 | Self aligning state machine | Feb 13, 2007 | Issued |
Array
(
[id] => 5003025
[patent_doc_number] => 20070200592
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[patent_title] => 'Dynamic output buffer circuit'
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Array
(
[id] => 4811129
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Array
(
[id] => 323160
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/703862 | Process monitor vehicle | Feb 6, 2007 | Issued |
Array
(
[id] => 4537477
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Array
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Array
(
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Array
(
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/618828 | Differential interfaces for power domain crossings | Dec 30, 2006 | Issued |