Search

Ferris Lander

Examiner (ID: 7708)

Most Active Art Unit
1103
Art Unit(s)
1108, 1303, 1802, 3307, 1103, 1209, 2899, 1754, 1306
Total Applications
1021
Issued Applications
801
Pending Applications
19
Abandoned Applications
201

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5208658 [patent_doc_number] => 20070247242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'QUADRATURE VOLTAGE-CONTROLLED OSCILLATOR' [patent_app_type] => utility [patent_app_number] => 11/733042 [patent_app_country] => US [patent_app_date] => 2007-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6414 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0247/20070247242.pdf [firstpage_image] =>[orig_patent_app_number] => 11733042 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/733042
QUADRATURE VOLTAGE-CONTROLLED OSCILLATOR Apr 8, 2007 Abandoned
Array ( [id] => 6425349 [patent_doc_number] => 20100102753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'Circuit Arrangement and Method for the Dimming Control of One or More Operating Device for Lamps' [patent_app_type] => utility [patent_app_number] => 12/529123 [patent_app_country] => US [patent_app_date] => 2007-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2461 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20100102753.pdf [firstpage_image] =>[orig_patent_app_number] => 12529123 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/529123
Circuit Arrangement and Method for the Dimming Control of One or More Operating Device for Lamps Feb 27, 2007 Abandoned
Array ( [id] => 143065 [patent_doc_number] => 07688106 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-03-30 [patent_title] => 'High-speed serial interface circuitry for programmable logic device integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/712609 [patent_app_country] => US [patent_app_date] => 2007-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2997 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/688/07688106.pdf [firstpage_image] =>[orig_patent_app_number] => 11712609 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/712609
High-speed serial interface circuitry for programmable logic device integrated circuits Feb 26, 2007 Issued
Array ( [id] => 5129409 [patent_doc_number] => 20070205806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-06 [patent_title] => 'Open-drain output circuit' [patent_app_type] => utility [patent_app_number] => 11/710941 [patent_app_country] => US [patent_app_date] => 2007-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4997 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20070205806.pdf [firstpage_image] =>[orig_patent_app_number] => 11710941 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/710941
Open-drain output circuit Feb 26, 2007 Issued
Array ( [id] => 7591316 [patent_doc_number] => 07653891 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-01-26 [patent_title] => 'Method of reducing power of a circuit' [patent_app_type] => utility [patent_app_number] => 11/710096 [patent_app_country] => US [patent_app_date] => 2007-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4658 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/653/07653891.pdf [firstpage_image] =>[orig_patent_app_number] => 11710096 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/710096
Method of reducing power of a circuit Feb 22, 2007 Issued
Array ( [id] => 5257921 [patent_doc_number] => 20070211553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'Semiconductor device reducing power consumption in standby mode' [patent_app_type] => utility [patent_app_number] => 11/708458 [patent_app_country] => US [patent_app_date] => 2007-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 19738 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20070211553.pdf [firstpage_image] =>[orig_patent_app_number] => 11708458 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/708458
Semiconductor device reducing power consumption in standby mode Feb 20, 2007 Issued
Array ( [id] => 806360 [patent_doc_number] => 07424697 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-09-09 [patent_title] => 'Assigning inputs of look-up tables to improve a design implementation in a programmable logic device' [patent_app_type] => utility [patent_app_number] => 11/707317 [patent_app_country] => US [patent_app_date] => 2007-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7106 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/424/07424697.pdf [firstpage_image] =>[orig_patent_app_number] => 11707317 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/707317
Assigning inputs of look-up tables to improve a design implementation in a programmable logic device Feb 15, 2007 Issued
Array ( [id] => 4871143 [patent_doc_number] => 20080197877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'Per byte lane dynamic on-die termination' [patent_app_type] => utility [patent_app_number] => 11/708148 [patent_app_country] => US [patent_app_date] => 2007-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4131 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20080197877.pdf [firstpage_image] =>[orig_patent_app_number] => 11708148 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/708148
Per byte lane dynamic on-die termination Feb 15, 2007 Abandoned
Array ( [id] => 126710 [patent_doc_number] => 07711907 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-05-04 [patent_title] => 'Self aligning state machine' [patent_app_type] => utility [patent_app_number] => 11/707175 [patent_app_country] => US [patent_app_date] => 2007-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 24 [patent_no_of_words] => 17177 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/711/07711907.pdf [firstpage_image] =>[orig_patent_app_number] => 11707175 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/707175
Self aligning state machine Feb 13, 2007 Issued
Array ( [id] => 5003025 [patent_doc_number] => 20070200592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'Dynamic output buffer circuit' [patent_app_type] => utility [patent_app_number] => 11/705251 [patent_app_country] => US [patent_app_date] => 2007-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4254 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20070200592.pdf [firstpage_image] =>[orig_patent_app_number] => 11705251 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/705251
Dynamic output buffer circuit Feb 11, 2007 Issued
Array ( [id] => 4811129 [patent_doc_number] => 20080191760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'PLLS covering wide operating frequency ranges' [patent_app_type] => utility [patent_app_number] => 11/707778 [patent_app_country] => US [patent_app_date] => 2007-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3093 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20080191760.pdf [firstpage_image] =>[orig_patent_app_number] => 11707778 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/707778
PLLS covering wide operating frequency ranges Feb 11, 2007 Issued
Array ( [id] => 323160 [patent_doc_number] => 07518394 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-04-14 [patent_title] => 'Process monitor vehicle' [patent_app_type] => utility [patent_app_number] => 11/703862 [patent_app_country] => US [patent_app_date] => 2007-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3946 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/518/07518394.pdf [firstpage_image] =>[orig_patent_app_number] => 11703862 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/703862
Process monitor vehicle Feb 6, 2007 Issued
Array ( [id] => 4537477 [patent_doc_number] => 07924595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'High-density semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/701104 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4074 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/924/07924595.pdf [firstpage_image] =>[orig_patent_app_number] => 11701104 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701104
High-density semiconductor device Jan 30, 2007 Issued
Array ( [id] => 63892 [patent_doc_number] => 07764087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-27 [patent_title] => 'Low swing domino logic circuits' [patent_app_type] => utility [patent_app_number] => 11/701194 [patent_app_country] => US [patent_app_date] => 2007-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 7928 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/764/07764087.pdf [firstpage_image] =>[orig_patent_app_number] => 11701194 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701194
Low swing domino logic circuits Jan 30, 2007 Issued
Array ( [id] => 288681 [patent_doc_number] => 07552410 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-06-23 [patent_title] => 'Estimating LUT power usage' [patent_app_type] => utility [patent_app_number] => 11/650153 [patent_app_country] => US [patent_app_date] => 2007-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6301 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/552/07552410.pdf [firstpage_image] =>[orig_patent_app_number] => 11650153 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/650153
Estimating LUT power usage Jan 4, 2007 Issued
Array ( [id] => 4986376 [patent_doc_number] => 20070152714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'Logic circuit' [patent_app_type] => utility [patent_app_number] => 11/649301 [patent_app_country] => US [patent_app_date] => 2007-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2429 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20070152714.pdf [firstpage_image] =>[orig_patent_app_number] => 11649301 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/649301
Logic circuit Jan 3, 2007 Abandoned
Array ( [id] => 5067092 [patent_doc_number] => 20070188193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'Low-voltage-to-high-voltage level converter for digital signals and related integrated circuit, system, and method' [patent_app_type] => utility [patent_app_number] => 11/649746 [patent_app_country] => US [patent_app_date] => 2007-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3426 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20070188193.pdf [firstpage_image] =>[orig_patent_app_number] => 11649746 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/649746
Low-voltage-to-high-voltage level converter for digital signals and related integrated circuit, system, and method Jan 2, 2007 Issued
Array ( [id] => 4702310 [patent_doc_number] => 20080061832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-13 [patent_title] => 'Protection circuits and methods of protecting circuits' [patent_app_type] => utility [patent_app_number] => 11/649551 [patent_app_country] => US [patent_app_date] => 2007-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4998 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20080061832.pdf [firstpage_image] =>[orig_patent_app_number] => 11649551 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/649551
Protection circuits and methods of protecting circuits Jan 2, 2007 Abandoned
Array ( [id] => 212043 [patent_doc_number] => 07622950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'GPIO mux/dynamic port configuration' [patent_app_type] => utility [patent_app_number] => 11/650184 [patent_app_country] => US [patent_app_date] => 2007-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4498 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/622/07622950.pdf [firstpage_image] =>[orig_patent_app_number] => 11650184 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/650184
GPIO mux/dynamic port configuration Jan 2, 2007 Issued
Array ( [id] => 9312631 [patent_doc_number] => 08653853 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-18 [patent_title] => 'Differential interfaces for power domain crossings' [patent_app_type] => utility [patent_app_number] => 11/618828 [patent_app_country] => US [patent_app_date] => 2006-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5204 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11618828 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/618828
Differential interfaces for power domain crossings Dec 30, 2006 Issued
Menu