
Fetsum Abraham
Examiner (ID: 907)
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2508, 2825, 2811, 2818, 2515, 2826 |
| Total Applications | 1055 |
| Issued Applications | 981 |
| Pending Applications | 32 |
| Abandoned Applications | 42 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1266561
[patent_doc_number] => 06661088
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-12-09
[patent_title] => 'Semiconductor integrated circuit device having interposer and method of manufacturing the same'
[patent_app_type] => B1
[patent_app_number] => 09/669724
[patent_app_country] => US
[patent_app_date] => 2000-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 32
[patent_no_of_words] => 8748
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/661/06661088.pdf
[firstpage_image] =>[orig_patent_app_number] => 09669724
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/669724 | Semiconductor integrated circuit device having interposer and method of manufacturing the same | Sep 25, 2000 | Issued |
Array
(
[id] => 1284197
[patent_doc_number] => 06642543
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-04
[patent_title] => 'Thin and thick gate oxide transistors on a functional block of a CMOS circuit residing within the core of an IC chip'
[patent_app_type] => B1
[patent_app_number] => 09/670484
[patent_app_country] => US
[patent_app_date] => 2000-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 3861
[patent_no_of_claims] => 8
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[patent_words_short_claim] => 107
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/642/06642543.pdf
[firstpage_image] =>[orig_patent_app_number] => 09670484
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/670484 | Thin and thick gate oxide transistors on a functional block of a CMOS circuit residing within the core of an IC chip | Sep 25, 2000 | Issued |
Array
(
[id] => 7639826
[patent_doc_number] => 06396090
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-28
[patent_title] => 'Trench MOS device and termination structure'
[patent_app_type] => B1
[patent_app_number] => 09/668663
[patent_app_country] => US
[patent_app_date] => 2000-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 4094
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[pdf_file] => patents/06/396/06396090.pdf
[firstpage_image] =>[orig_patent_app_number] => 09668663
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/668663 | Trench MOS device and termination structure | Sep 21, 2000 | Issued |
Array
(
[id] => 7645274
[patent_doc_number] => 06472698
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-29
[patent_title] => 'Solid state image sensor and method for fabricating the same'
[patent_app_type] => B1
[patent_app_number] => 09/665903
[patent_app_country] => US
[patent_app_date] => 2000-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 4473
[patent_no_of_claims] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/472/06472698.pdf
[firstpage_image] =>[orig_patent_app_number] => 09665903
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/665903 | Solid state image sensor and method for fabricating the same | Sep 19, 2000 | Issued |
Array
(
[id] => 1547372
[patent_doc_number] => 06445021
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-03
[patent_title] => 'Negative differential resistance reoxidized nitride silicon-based photodiode and method'
[patent_app_type] => B1
[patent_app_number] => 09/665913
[patent_app_country] => US
[patent_app_date] => 2000-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/445/06445021.pdf
[firstpage_image] =>[orig_patent_app_number] => 09665913
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/665913 | Negative differential resistance reoxidized nitride silicon-based photodiode and method | Sep 19, 2000 | Issued |
Array
(
[id] => 1436575
[patent_doc_number] => 06355959
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-12
[patent_title] => 'Gate electrode controllable electrostatic discharge (ESD) protection structure having a MOSFET with source and drain regions in separate wells'
[patent_app_type] => B1
[patent_app_number] => 09/658743
[patent_app_country] => US
[patent_app_date] => 2000-09-11
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 3229
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/355/06355959.pdf
[firstpage_image] =>[orig_patent_app_number] => 09658743
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/658743 | Gate electrode controllable electrostatic discharge (ESD) protection structure having a MOSFET with source and drain regions in separate wells | Sep 10, 2000 | Issued |
Array
(
[id] => 1404690
[patent_doc_number] => 06531775
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-11
[patent_title] => 'High-frequency module'
[patent_app_type] => B1
[patent_app_number] => 09/653194
[patent_app_country] => US
[patent_app_date] => 2000-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 39
[patent_no_of_words] => 10367
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/531/06531775.pdf
[firstpage_image] =>[orig_patent_app_number] => 09653194
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/653194 | High-frequency module | Aug 30, 2000 | Issued |
Array
(
[id] => 1391510
[patent_doc_number] => 06552410
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-04-22
[patent_title] => 'Programmable antifuse interfacing a programmable logic and a dedicated device'
[patent_app_type] => B1
[patent_app_number] => 09/650773
[patent_app_country] => US
[patent_app_date] => 2000-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 54
[patent_no_of_words] => 8489
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/552/06552410.pdf
[firstpage_image] =>[orig_patent_app_number] => 09650773
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/650773 | Programmable antifuse interfacing a programmable logic and a dedicated device | Aug 28, 2000 | Issued |
Array
(
[id] => 1336446
[patent_doc_number] => 06597020
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-07-22
[patent_title] => 'Process for packaging a chip with sensors and semiconductor package containing such a chip'
[patent_app_type] => B1
[patent_app_number] => 09/648843
[patent_app_country] => US
[patent_app_date] => 2000-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2199
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[pdf_file] => patents/06/597/06597020.pdf
[firstpage_image] =>[orig_patent_app_number] => 09648843
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/648843 | Process for packaging a chip with sensors and semiconductor package containing such a chip | Aug 24, 2000 | Issued |
Array
(
[id] => 1491816
[patent_doc_number] => 06417543
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-09
[patent_title] => 'MIS semiconductor device with sloped gate, source, and drain regions'
[patent_app_type] => B1
[patent_app_number] => 09/641559
[patent_app_country] => US
[patent_app_date] => 2000-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 7402
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/417/06417543.pdf
[firstpage_image] =>[orig_patent_app_number] => 09641559
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/641559 | MIS semiconductor device with sloped gate, source, and drain regions | Aug 17, 2000 | Issued |
Array
(
[id] => 1385989
[patent_doc_number] => 06548370
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-04-15
[patent_title] => 'Method of crystallizing a semiconductor layer by applying laser irradiation that vary in energy to its top and bottom surfaces'
[patent_app_type] => B1
[patent_app_number] => 09/640084
[patent_app_country] => US
[patent_app_date] => 2000-08-17
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 19434
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[pdf_file] => patents/06/548/06548370.pdf
[firstpage_image] =>[orig_patent_app_number] => 09640084
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/640084 | Method of crystallizing a semiconductor layer by applying laser irradiation that vary in energy to its top and bottom surfaces | Aug 16, 2000 | Issued |
Array
(
[id] => 1409647
[patent_doc_number] => 06534794
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-18
[patent_title] => 'Semiconductor light-emitting unit, optical apparatus and optical disk system having heat sinking means and a heating element incorporated with the mounting system'
[patent_app_type] => B1
[patent_app_number] => 09/633234
[patent_app_country] => US
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[pdf_file] => patents/06/534/06534794.pdf
[firstpage_image] =>[orig_patent_app_number] => 09633234
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/633234 | Semiconductor light-emitting unit, optical apparatus and optical disk system having heat sinking means and a heating element incorporated with the mounting system | Aug 3, 2000 | Issued |
Array
(
[id] => 7634394
[patent_doc_number] => 06657226
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-12-02
[patent_title] => 'Thin-film transistor array and method for manufacturing same'
[patent_app_type] => B1
[patent_app_number] => 09/632247
[patent_app_country] => US
[patent_app_date] => 2000-08-03
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 9118
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[pdf_file] => patents/06/657/06657226.pdf
[firstpage_image] =>[orig_patent_app_number] => 09632247
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/632247 | Thin-film transistor array and method for manufacturing same | Aug 2, 2000 | Issued |
Array
(
[id] => 1580425
[patent_doc_number] => 06448652
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-10
[patent_title] => 'Interconnect structure with a dielectric layer conforming to the perimeter of a wiring layer'
[patent_app_type] => B1
[patent_app_number] => 09/626120
[patent_app_country] => US
[patent_app_date] => 2000-07-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/448/06448652.pdf
[firstpage_image] =>[orig_patent_app_number] => 09626120
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/626120 | Interconnect structure with a dielectric layer conforming to the perimeter of a wiring layer | Jul 25, 2000 | Issued |
Array
(
[id] => 1497083
[patent_doc_number] => 06404034
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-11
[patent_title] => 'CMOS circuit with all-around dielectrically insulated source-drain regions'
[patent_app_type] => B1
[patent_app_number] => 09/621182
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[pdf_file] => patents/06/404/06404034.pdf
[firstpage_image] =>[orig_patent_app_number] => 09621182
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/621182 | CMOS circuit with all-around dielectrically insulated source-drain regions | Jul 20, 2000 | Issued |
Array
(
[id] => 7647093
[patent_doc_number] => 06476425
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-11-05
[patent_title] => 'Master-slice system semiconductor integrated circuit and design method thereof'
[patent_app_type] => B1
[patent_app_number] => 09/509307
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[pdf_file] => patents/06/476/06476425.pdf
[firstpage_image] =>[orig_patent_app_number] => 09509307
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/509307 | Master-slice system semiconductor integrated circuit and design method thereof | Jun 21, 2000 | Issued |
Array
(
[id] => 1423912
[patent_doc_number] => 06515299
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-02-04
[patent_title] => 'Semiconductor device with rod like crystals and a recessed insulation layer'
[patent_app_type] => B1
[patent_app_number] => 09/596011
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[firstpage_image] =>[orig_patent_app_number] => 09596011
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/596011 | Semiconductor device with rod like crystals and a recessed insulation layer | Jun 15, 2000 | Issued |
Array
(
[id] => 1478863
[patent_doc_number] => 06344675
[patent_country] => US
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[patent_issue_date] => 2002-02-05
[patent_title] => 'SOI-MOS field effect transistor with improved source/drain structure and method of forming the same'
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Array
(
[id] => 1582967
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[patent_issue_date] => 2002-07-23
[patent_title] => 'Body-triggered ESD protection circuit'
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[firstpage_image] =>[orig_patent_app_number] => 09586637
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/586637 | Body-triggered ESD protection circuit | Jun 4, 2000 | Issued |
Array
(
[id] => 1471608
[patent_doc_number] => 06407433
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-18
[patent_title] => 'Preventing gate oxide damage by post poly definition implantation while gate mask is on'
[patent_app_type] => B1
[patent_app_number] => 09/575446
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 09575446
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/575446 | Preventing gate oxide damage by post poly definition implantation while gate mask is on | May 21, 2000 | Issued |