
Fetsum Abraham
Examiner (ID: 1991)
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2818, 2508, 2826, 2811, 2825, 2515 |
| Total Applications | 1055 |
| Issued Applications | 981 |
| Pending Applications | 32 |
| Abandoned Applications | 42 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6998465
[patent_doc_number] => 20010052643
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-12-20
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME'
[patent_app_type] => new
[patent_app_number] => 09/324774
[patent_app_country] => US
[patent_app_date] => 1999-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6050
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20010052643.pdf
[firstpage_image] =>[orig_patent_app_number] => 09324774
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/324774 | Semiconductor package with sloped outer leads | Jun 2, 1999 | Issued |
Array
(
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[patent_doc_number] => 06320264
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-20
[patent_title] => 'Interconnect wiring with sidewalls and inter-wiring insulation composed of fluorine'
[patent_app_type] => 1
[patent_app_number] => 9/323124
[patent_app_country] => US
[patent_app_date] => 1999-06-01
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/320/06320264.pdf
[firstpage_image] =>[orig_patent_app_number] => 323124
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/323124 | Interconnect wiring with sidewalls and inter-wiring insulation composed of fluorine | May 31, 1999 | Issued |
Array
(
[id] => 1495465
[patent_doc_number] => 06342716
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-01-29
[patent_title] => 'Semiconductor device having dot elements as floating gate'
[patent_app_type] => B1
[patent_app_number] => 09/320695
[patent_app_country] => US
[patent_app_date] => 1999-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 21
[patent_no_of_words] => 14452
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[pdf_file] => patents/06/342/06342716.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/320695 | Semiconductor device having dot elements as floating gate | May 26, 1999 | Issued |
Array
(
[id] => 4324746
[patent_doc_number] => 06249029
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-19
[patent_title] => 'Device method for enhanced avalanche SOI CMOS'
[patent_app_type] => 1
[patent_app_number] => 9/320595
[patent_app_country] => US
[patent_app_date] => 1999-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/249/06249029.pdf
[firstpage_image] =>[orig_patent_app_number] => 320595
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/320595 | Device method for enhanced avalanche SOI CMOS | May 25, 1999 | Issued |
Array
(
[id] => 4365780
[patent_doc_number] => 06255668
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Thin film transistor with inclined eletrode side surfaces'
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[patent_app_number] => 9/317952
[patent_app_country] => US
[patent_app_date] => 1999-05-25
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/255/06255668.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/317952 | Thin film transistor with inclined eletrode side surfaces | May 24, 1999 | Issued |
Array
(
[id] => 1436642
[patent_doc_number] => 06355979
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-03-12
[patent_title] => 'Hard mask for copper plasma etch'
[patent_app_type] => B2
[patent_app_number] => 09/318474
[patent_app_country] => US
[patent_app_date] => 1999-05-25
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[pdf_file] => patents/06/355/06355979.pdf
[firstpage_image] =>[orig_patent_app_number] => 09318474
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/318474 | Hard mask for copper plasma etch | May 24, 1999 | Issued |
Array
(
[id] => 4197485
[patent_doc_number] => 06043536
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-28
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/313774
[patent_app_country] => US
[patent_app_date] => 1999-05-18
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/043/06043536.pdf
[firstpage_image] =>[orig_patent_app_number] => 313774
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/313774 | Semiconductor device | May 17, 1999 | Issued |
Array
(
[id] => 4413605
[patent_doc_number] => 06300651
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-09
[patent_title] => 'Chip layout for symmetrical-critical elements'
[patent_app_type] => 1
[patent_app_number] => 9/313263
[patent_app_country] => US
[patent_app_date] => 1999-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/06/300/06300651.pdf
[firstpage_image] =>[orig_patent_app_number] => 313263
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/313263 | Chip layout for symmetrical-critical elements | May 17, 1999 | Issued |
Array
(
[id] => 7639769
[patent_doc_number] => 06396147
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-28
[patent_title] => 'Semiconductor device with metal-oxide conductors'
[patent_app_type] => B1
[patent_app_number] => 09/311994
[patent_app_country] => US
[patent_app_date] => 1999-05-14
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[pdf_file] => patents/06/396/06396147.pdf
[firstpage_image] =>[orig_patent_app_number] => 09311994
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/311994 | Semiconductor device with metal-oxide conductors | May 13, 1999 | Issued |
Array
(
[id] => 4293829
[patent_doc_number] => 06211534
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-03
[patent_title] => 'Thin film transistor array and method for fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 9/310574
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[patent_app_date] => 1999-05-12
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[pdf_file] => patents/06/211/06211534.pdf
[firstpage_image] =>[orig_patent_app_number] => 310574
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/310574 | Thin film transistor array and method for fabricating the same | May 11, 1999 | Issued |
Array
(
[id] => 4318216
[patent_doc_number] => 06316833
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-13
[patent_title] => 'Semiconductor device with multilayer interconnection having HSQ film with implanted fluorine and fluorine preventing liner'
[patent_app_type] => 1
[patent_app_number] => 9/305425
[patent_app_country] => US
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[pdf_file] => patents/06/316/06316833.pdf
[firstpage_image] =>[orig_patent_app_number] => 305425
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/305425 | Semiconductor device with multilayer interconnection having HSQ film with implanted fluorine and fluorine preventing liner | May 4, 1999 | Issued |
Array
(
[id] => 4424590
[patent_doc_number] => 06225645
[patent_country] => US
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[patent_issue_date] => 2001-05-01
[patent_title] => 'Semiconductor device and method of manufacturing the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/304975 | Semiconductor device and method of manufacturing the same | May 2, 1999 | Issued |
Array
(
[id] => 7643532
[patent_doc_number] => 06429509
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[patent_kind] => B1
[patent_issue_date] => 2002-08-06
[patent_title] => 'Integrated circuit with improved interconnect structure and process for making same'
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[patent_app_number] => 09/304244
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Array
(
[id] => 1486723
[patent_doc_number] => 06365935
[patent_country] => US
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[patent_issue_date] => 2002-04-02
[patent_title] => 'TFT having hydrogen containing buffer and substrate regions'
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Array
(
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[patent_title] => 'Dielectrically isolated IC driver having upper-side and lower-side arm drivers and power IC having the same'
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Array
(
[id] => 4410421
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[patent_title] => 'Thin film transistor with silicon oxynitride film and silicon nitride channel passivation film for preventing a back channel effect and a method for fabricating the same'
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Array
(
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[patent_title] => 'Direct bonding of small parts and module of combined small parts without an intermediate layer inbetween'
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Array
(
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/296054 | Apparatus and method of encapsulated copper (Cu) Interconnect formation | Apr 20, 1999 | Issued |