Search

Fetsum Abraham

Examiner (ID: 1991)

Most Active Art Unit
2826
Art Unit(s)
2818, 2508, 2826, 2811, 2825, 2515
Total Applications
1055
Issued Applications
981
Pending Applications
32
Abandoned Applications
42

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4151974 [patent_doc_number] => 06064092 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Semiconductor-on-insulator substrates containing electrically insulating mesas' [patent_app_type] => 1 [patent_app_number] => 9/291416 [patent_app_country] => US [patent_app_date] => 1999-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2005 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/064/06064092.pdf [firstpage_image] =>[orig_patent_app_number] => 291416 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/291416
Semiconductor-on-insulator substrates containing electrically insulating mesas Apr 12, 1999 Issued
Array ( [id] => 1284296 [patent_doc_number] => 06642557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-04 [patent_title] => 'Isolated junction structure for a MOSFET' [patent_app_type] => B2 [patent_app_number] => 09/289424 [patent_app_country] => US [patent_app_date] => 1999-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2294 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642557.pdf [firstpage_image] =>[orig_patent_app_number] => 09289424 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/289424
Isolated junction structure for a MOSFET Apr 8, 1999 Issued
Array ( [id] => 4254566 [patent_doc_number] => 06222234 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Semiconductor device having partially and fully depleted SOI elements on a common substrate' [patent_app_type] => 1 [patent_app_number] => 9/288314 [patent_app_country] => US [patent_app_date] => 1999-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 4182 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/222/06222234.pdf [firstpage_image] =>[orig_patent_app_number] => 288314 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/288314
Semiconductor device having partially and fully depleted SOI elements on a common substrate Apr 7, 1999 Issued
Array ( [id] => 4401247 [patent_doc_number] => 06297529 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Semiconductor device with multilayered gate structure' [patent_app_type] => 1 [patent_app_number] => 9/286334 [patent_app_country] => US [patent_app_date] => 1999-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 16 [patent_no_of_words] => 3332 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/297/06297529.pdf [firstpage_image] =>[orig_patent_app_number] => 286334 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/286334
Semiconductor device with multilayered gate structure Apr 4, 1999 Issued
Array ( [id] => 4319641 [patent_doc_number] => 06242779 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Selective silicide thin-film transistor having polysilicon active layers with crystallizing metal agent introduced only in the source/drain regions' [patent_app_type] => 1 [patent_app_number] => 9/286104 [patent_app_country] => US [patent_app_date] => 1999-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 7849 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242779.pdf [firstpage_image] =>[orig_patent_app_number] => 286104 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/286104
Selective silicide thin-film transistor having polysilicon active layers with crystallizing metal agent introduced only in the source/drain regions Apr 1, 1999 Issued
Array ( [id] => 1375153 [patent_doc_number] => 06566756 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-20 [patent_title] => 'Semiconductor device with porous interlayer film of a range of average diameter having partially closed holes' [patent_app_type] => B1 [patent_app_number] => 09/280868 [patent_app_country] => US [patent_app_date] => 1999-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 8325 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/566/06566756.pdf [firstpage_image] =>[orig_patent_app_number] => 09280868 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/280868
Semiconductor device with porous interlayer film of a range of average diameter having partially closed holes Mar 28, 1999 Issued
Array ( [id] => 4278143 [patent_doc_number] => 06323542 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument' [patent_app_type] => 1 [patent_app_number] => 9/142856 [patent_app_country] => US [patent_app_date] => 1999-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 30 [patent_no_of_words] => 10825 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323542.pdf [firstpage_image] =>[orig_patent_app_number] => 142856 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/142856
Electronic component, semiconductor device, methods of manufacturing the same, circuit board, and electronic instrument Mar 25, 1999 Issued
Array ( [id] => 4190285 [patent_doc_number] => 06160277 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Field effect transistor assemblies and transistor gate block stacks' [patent_app_type] => 1 [patent_app_number] => 9/273080 [patent_app_country] => US [patent_app_date] => 1999-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2503 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160277.pdf [firstpage_image] =>[orig_patent_app_number] => 273080 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/273080
Field effect transistor assemblies and transistor gate block stacks Mar 18, 1999 Issued
Array ( [id] => 4292418 [patent_doc_number] => 06268630 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications' [patent_app_type] => 1 [patent_app_number] => 9/270374 [patent_app_country] => US [patent_app_date] => 1999-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 7166 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/268/06268630.pdf [firstpage_image] =>[orig_patent_app_number] => 270374 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/270374
Silicon-on-insulator field effect transistor with improved body ties for rad-hard applications Mar 15, 1999 Issued
Array ( [id] => 7643558 [patent_doc_number] => 06429483 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Semiconductor device and method for forming the same' [patent_app_type] => B1 [patent_app_number] => 09/266864 [patent_app_country] => US [patent_app_date] => 1999-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 5837 [patent_no_of_claims] => 126 [patent_no_of_ind_claims] => 24 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429483.pdf [firstpage_image] =>[orig_patent_app_number] => 09266864 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/266864
Semiconductor device and method for forming the same Mar 11, 1999 Issued
Array ( [id] => 4301473 [patent_doc_number] => 06198150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-06 [patent_title] => 'Integrated circuit with deep trench having multiple slopes' [patent_app_type] => 1 [patent_app_number] => 9/266066 [patent_app_country] => US [patent_app_date] => 1999-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2620 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/198/06198150.pdf [firstpage_image] =>[orig_patent_app_number] => 266066 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/266066
Integrated circuit with deep trench having multiple slopes Mar 9, 1999 Issued
Array ( [id] => 1522248 [patent_doc_number] => 06414353 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'TFT with partially depleted body' [patent_app_type] => B1 [patent_app_number] => 09/265697 [patent_app_country] => US [patent_app_date] => 1999-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 30 [patent_no_of_words] => 13582 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/414/06414353.pdf [firstpage_image] =>[orig_patent_app_number] => 09265697 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/265697
TFT with partially depleted body Mar 9, 1999 Issued
Array ( [id] => 4265878 [patent_doc_number] => 06259137 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Defect induced buried oxide (DIBOX) for throughput SOI' [patent_app_type] => 1 [patent_app_number] => 9/264973 [patent_app_country] => US [patent_app_date] => 1999-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4445 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/259/06259137.pdf [firstpage_image] =>[orig_patent_app_number] => 264973 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/264973
Defect induced buried oxide (DIBOX) for throughput SOI Mar 8, 1999 Issued
Array ( [id] => 4423624 [patent_doc_number] => 06177707 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Semiconductor device comprising a glass supporting body onto which a substrate with semiconductor elements and a metalization is attached by means of an adhesive' [patent_app_type] => 1 [patent_app_number] => 9/258430 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2989 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177707.pdf [firstpage_image] =>[orig_patent_app_number] => 258430 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/258430
Semiconductor device comprising a glass supporting body onto which a substrate with semiconductor elements and a metalization is attached by means of an adhesive Feb 25, 1999 Issued
Array ( [id] => 6475878 [patent_doc_number] => 20020024083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-28 [patent_title] => 'DRAM TECHNOLOGY COMPATIBLE NON VOLATILE MEMORY CELLS' [patent_app_type] => new [patent_app_number] => 09/259493 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8056 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20020024083.pdf [firstpage_image] =>[orig_patent_app_number] => 09259493 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/259493
DRAM technology compatible non volatile memory cells with capacitors connected to the gates of the transistors Feb 25, 1999 Issued
Array ( [id] => 4292534 [patent_doc_number] => 06268638 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Metal wire fuse structure with cavity' [patent_app_type] => 1 [patent_app_number] => 9/258563 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3613 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/268/06268638.pdf [firstpage_image] =>[orig_patent_app_number] => 258563 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/258563
Metal wire fuse structure with cavity Feb 25, 1999 Issued
Array ( [id] => 4320063 [patent_doc_number] => 06242807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Semiconductor integrated circuit having heat sinking means for heat generating wires' [patent_app_type] => 1 [patent_app_number] => 9/252985 [patent_app_country] => US [patent_app_date] => 1999-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2871 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242807.pdf [firstpage_image] =>[orig_patent_app_number] => 252985 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/252985
Semiconductor integrated circuit having heat sinking means for heat generating wires Feb 18, 1999 Issued
Array ( [id] => 4163060 [patent_doc_number] => 06114728 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'MIS semiconductor device having a tapered top gate and a capacitor with metal oxide dielectric material' [patent_app_type] => 1 [patent_app_number] => 9/251436 [patent_app_country] => US [patent_app_date] => 1999-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 49 [patent_no_of_words] => 7442 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/114/06114728.pdf [firstpage_image] =>[orig_patent_app_number] => 251436 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/251436
MIS semiconductor device having a tapered top gate and a capacitor with metal oxide dielectric material Feb 16, 1999 Issued
Array ( [id] => 4094761 [patent_doc_number] => 06133609 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'High-voltage thin-film transistor with sub-gate elements' [patent_app_type] => 1 [patent_app_number] => 9/251455 [patent_app_country] => US [patent_app_date] => 1999-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3553 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133609.pdf [firstpage_image] =>[orig_patent_app_number] => 251455 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/251455
High-voltage thin-film transistor with sub-gate elements Feb 16, 1999 Issued
Array ( [id] => 1495456 [patent_doc_number] => 06342714 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-29 [patent_title] => 'HSG lower electrode structure having a neck supported by a silicon layer' [patent_app_type] => B1 [patent_app_number] => 09/249016 [patent_app_country] => US [patent_app_date] => 1999-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4507 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/342/06342714.pdf [firstpage_image] =>[orig_patent_app_number] => 09249016 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/249016
HSG lower electrode structure having a neck supported by a silicon layer Feb 11, 1999 Issued
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