Search

Fetsum Abraham

Examiner (ID: 13571)

Most Active Art Unit
2826
Art Unit(s)
2825, 2515, 2508, 2826, 2811, 2818
Total Applications
1055
Issued Applications
981
Pending Applications
32
Abandoned Applications
42

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4111442 [patent_doc_number] => 06023090 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Lateral thin-film Silicon-On-Insulator (SOI) device having multiple zones in the drift region' [patent_app_type] => 1 [patent_app_number] => 9/206434 [patent_app_country] => US [patent_app_date] => 1998-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2579 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023090.pdf [firstpage_image] =>[orig_patent_app_number] => 206434 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/206434
Lateral thin-film Silicon-On-Insulator (SOI) device having multiple zones in the drift region Dec 6, 1998 Issued
Array ( [id] => 4300824 [patent_doc_number] => 06184541 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Thin film transistor and method of producing the same' [patent_app_type] => 1 [patent_app_number] => 9/205775 [patent_app_country] => US [patent_app_date] => 1998-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2661 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184541.pdf [firstpage_image] =>[orig_patent_app_number] => 205775 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/205775
Thin film transistor and method of producing the same Dec 2, 1998 Issued
Array ( [id] => 4163080 [patent_doc_number] => 06114729 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Plural wells structure in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/200794 [patent_app_country] => US [patent_app_date] => 1998-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2628 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/114/06114729.pdf [firstpage_image] =>[orig_patent_app_number] => 200794 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/200794
Plural wells structure in a semiconductor device Nov 29, 1998 Issued
09/196745 MIS SEMICONDUCTOR DEVICE HAVING AN LDD STRUCTURE AND A MANUFACTURING METHOD THEREFOR Nov 19, 1998 Abandoned
Array ( [id] => 3960709 [patent_doc_number] => 05936261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Elevated image sensor array which includes isolation between the image sensors and a unique interconnection' [patent_app_type] => 1 [patent_app_number] => 9/195535 [patent_app_country] => US [patent_app_date] => 1998-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4749 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936261.pdf [firstpage_image] =>[orig_patent_app_number] => 195535 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/195535
Elevated image sensor array which includes isolation between the image sensors and a unique interconnection Nov 17, 1998 Issued
Array ( [id] => 4189576 [patent_doc_number] => 06150708 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Advanced CMOS circuitry that utilizes both sides of a wafer surface for increased circuit density' [patent_app_type] => 1 [patent_app_number] => 9/191305 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 7038 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150708.pdf [firstpage_image] =>[orig_patent_app_number] => 191305 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/191305
Advanced CMOS circuitry that utilizes both sides of a wafer surface for increased circuit density Nov 12, 1998 Issued
Array ( [id] => 4196328 [patent_doc_number] => 06130457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Semiconductor-on-insulator devices having insulating layers therein with self-aligned openings' [patent_app_type] => 1 [patent_app_number] => 9/192125 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3643 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130457.pdf [firstpage_image] =>[orig_patent_app_number] => 192125 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/192125
Semiconductor-on-insulator devices having insulating layers therein with self-aligned openings Nov 12, 1998 Issued
Array ( [id] => 4218892 [patent_doc_number] => 06164781 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'High temperature transistor with reduced risk of electromigration and differently shaped electrodes' [patent_app_type] => 1 [patent_app_number] => 9/192155 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2873 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/164/06164781.pdf [firstpage_image] =>[orig_patent_app_number] => 192155 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/192155
High temperature transistor with reduced risk of electromigration and differently shaped electrodes Nov 12, 1998 Issued
Array ( [id] => 4308627 [patent_doc_number] => 06328176 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Multifunctional protective component' [patent_app_type] => 1 [patent_app_number] => 9/101521 [patent_app_country] => US [patent_app_date] => 1998-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1547 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/328/06328176.pdf [firstpage_image] =>[orig_patent_app_number] => 101521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/101521
Multifunctional protective component Nov 11, 1998 Issued
Array ( [id] => 4274996 [patent_doc_number] => 06307234 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Complementary MOS semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/190010 [patent_app_country] => US [patent_app_date] => 1998-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6635 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/307/06307234.pdf [firstpage_image] =>[orig_patent_app_number] => 190010 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/190010
Complementary MOS semiconductor device Nov 11, 1998 Issued
Array ( [id] => 4212317 [patent_doc_number] => 06028337 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Lateral thin-film silicon-on-insulator (SOI) device having lateral depletion means for depleting a portion of drift region' [patent_app_type] => 1 [patent_app_number] => 9/187874 [patent_app_country] => US [patent_app_date] => 1998-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2389 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/028/06028337.pdf [firstpage_image] =>[orig_patent_app_number] => 187874 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/187874
Lateral thin-film silicon-on-insulator (SOI) device having lateral depletion means for depleting a portion of drift region Nov 5, 1998 Issued
Array ( [id] => 4410633 [patent_doc_number] => 06232620 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Active matrix type TFT elements array having protrusion on gate lines' [patent_app_type] => 1 [patent_app_number] => 9/186285 [patent_app_country] => US [patent_app_date] => 1998-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 3255 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232620.pdf [firstpage_image] =>[orig_patent_app_number] => 186285 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/186285
Active matrix type TFT elements array having protrusion on gate lines Nov 4, 1998 Issued
Array ( [id] => 4147565 [patent_doc_number] => 06031247 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Liquid crystal display' [patent_app_type] => 1 [patent_app_number] => 9/185069 [patent_app_country] => US [patent_app_date] => 1998-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1632 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/031/06031247.pdf [firstpage_image] =>[orig_patent_app_number] => 185069 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/185069
Liquid crystal display Nov 2, 1998 Issued
Array ( [id] => 1436511 [patent_doc_number] => 06355939 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Multi-band infrared photodetector' [patent_app_type] => B1 [patent_app_number] => 09/185262 [patent_app_country] => US [patent_app_date] => 1998-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5866 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/355/06355939.pdf [firstpage_image] =>[orig_patent_app_number] => 09185262 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/185262
Multi-band infrared photodetector Nov 2, 1998 Issued
Array ( [id] => 4277787 [patent_doc_number] => 06323521 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Thin film transistor with electrodes having compressive and tensile stress' [patent_app_type] => 1 [patent_app_number] => 9/184824 [patent_app_country] => US [patent_app_date] => 1998-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5947 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323521.pdf [firstpage_image] =>[orig_patent_app_number] => 184824 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/184824
Thin film transistor with electrodes having compressive and tensile stress Nov 1, 1998 Issued
Array ( [id] => 4190532 [patent_doc_number] => 06160293 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Sub-quarter micron silicon-on-insulator MOS field effect transistor with deep silicide contact layers' [patent_app_type] => 1 [patent_app_number] => 9/176914 [patent_app_country] => US [patent_app_date] => 1998-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8731 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160293.pdf [firstpage_image] =>[orig_patent_app_number] => 176914 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/176914
Sub-quarter micron silicon-on-insulator MOS field effect transistor with deep silicide contact layers Oct 21, 1998 Issued
Array ( [id] => 4324730 [patent_doc_number] => 06249028 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Operable floating gate contact for SOI with high Vt well' [patent_app_type] => 1 [patent_app_number] => 9/175308 [patent_app_country] => US [patent_app_date] => 1998-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 2997 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249028.pdf [firstpage_image] =>[orig_patent_app_number] => 175308 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/175308
Operable floating gate contact for SOI with high Vt well Oct 19, 1998 Issued
Array ( [id] => 4101902 [patent_doc_number] => 06097080 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Semiconductor device having magnetic shield layer circumscribing the device' [patent_app_type] => 1 [patent_app_number] => 9/171455 [patent_app_country] => US [patent_app_date] => 1998-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3230 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/097/06097080.pdf [firstpage_image] =>[orig_patent_app_number] => 171455 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/171455
Semiconductor device having magnetic shield layer circumscribing the device Oct 18, 1998 Issued
Array ( [id] => 4309585 [patent_doc_number] => 06188110 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Integration of isolation with epitaxial growth regions for enhanced device formation' [patent_app_type] => 1 [patent_app_number] => 9/173015 [patent_app_country] => US [patent_app_date] => 1998-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4666 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/188/06188110.pdf [firstpage_image] =>[orig_patent_app_number] => 173015 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/173015
Integration of isolation with epitaxial growth regions for enhanced device formation Oct 14, 1998 Issued
Array ( [id] => 4244294 [patent_doc_number] => 06166440 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Interconnection for preventing signal interference in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/173295 [patent_app_country] => US [patent_app_date] => 1998-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2662 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166440.pdf [firstpage_image] =>[orig_patent_app_number] => 173295 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/173295
Interconnection for preventing signal interference in a semiconductor device Oct 13, 1998 Issued
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