
Fetsum Abraham
Examiner (ID: 18739)
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2508, 2515, 2818, 2811, 2826, 2825 |
| Total Applications | 1055 |
| Issued Applications | 981 |
| Pending Applications | 32 |
| Abandoned Applications | 42 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16934656
[patent_doc_number] => 20210200545
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-01
[patent_title] => COHERENCY TRACKING APPARATUS AND METHOD FOR AN ATTACHED COPROCESSOR OR ACCELERATOR
[patent_app_type] => utility
[patent_app_number] => 16/728665
[patent_app_country] => US
[patent_app_date] => 2019-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15623
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -25
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16728665
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/728665 | Coherency tracking apparatus and method for an attached coprocessor or accelerator | Dec 26, 2019 | Issued |
Array
(
[id] => 17210489
[patent_doc_number] => 11170864
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-09
[patent_title] => Methods and apparatus to improve performance while reading a one-time-programmable memory
[patent_app_type] => utility
[patent_app_number] => 16/728975
[patent_app_country] => US
[patent_app_date] => 2019-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 14162
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16728975
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/728975 | Methods and apparatus to improve performance while reading a one-time-programmable memory | Dec 26, 2019 | Issued |
Array
(
[id] => 16746240
[patent_doc_number] => 10971240
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-04-06
[patent_title] => Wordline smart tracking verify
[patent_app_type] => utility
[patent_app_number] => 16/726387
[patent_app_country] => US
[patent_app_date] => 2019-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 26
[patent_no_of_words] => 14388
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16726387
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/726387 | Wordline smart tracking verify | Dec 23, 2019 | Issued |
Array
(
[id] => 15874191
[patent_doc_number] => 20200144499
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-07
[patent_title] => SYSTEMS AND METHODS FOR GATED-INSULATOR RECONFIGURABLE NON-VOLATILE MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/726371
[patent_app_country] => US
[patent_app_date] => 2019-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13335
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16726371
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/726371 | Systems and methods for gated-insulator reconfigurable non-volatile memory devices | Dec 23, 2019 | Issued |
Array
(
[id] => 16119715
[patent_doc_number] => 20200211880
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-02
[patent_title] => SUBSTRATE TREATING APPARATUS AND SUBSTRATE TRANSPORTING METHOD
[patent_app_type] => utility
[patent_app_number] => 16/724429
[patent_app_country] => US
[patent_app_date] => 2019-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16479
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 366
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724429
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/724429 | Substrate treating apparatus and substrate transporting method | Dec 22, 2019 | Issued |
Array
(
[id] => 15775237
[patent_doc_number] => 20200118636
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-16
[patent_title] => TECHNIQUES FOR PREVENTING READ DISTURB IN NAND MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/715791
[patent_app_country] => US
[patent_app_date] => 2019-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6971
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715791
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/715791 | Techniques for preventing read disturb in NAND memory | Dec 15, 2019 | Issued |
Array
(
[id] => 16668251
[patent_doc_number] => 10937504
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-03-02
[patent_title] => Methods of programming memory device
[patent_app_type] => utility
[patent_app_number] => 16/714769
[patent_app_country] => US
[patent_app_date] => 2019-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 4281
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714769
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/714769 | Methods of programming memory device | Dec 14, 2019 | Issued |
Array
(
[id] => 16495501
[patent_doc_number] => 10861548
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-08
[patent_title] => Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
[patent_app_type] => utility
[patent_app_number] => 16/710423
[patent_app_country] => US
[patent_app_date] => 2019-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 72
[patent_figures_cnt] => 75
[patent_no_of_words] => 22840
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710423
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/710423 | Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating | Dec 10, 2019 | Issued |
Array
(
[id] => 16965971
[patent_doc_number] => 20210217470
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-15
[patent_title] => SYSTEM AND METHOD FOR READING MEMORY CELLS
[patent_app_type] => utility
[patent_app_number] => 16/771177
[patent_app_country] => US
[patent_app_date] => 2019-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15455
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -31
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16771177
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/771177 | System and method for reading memory cells | Dec 2, 2019 | Issued |
Array
(
[id] => 17196080
[patent_doc_number] => 11164847
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-02
[patent_title] => Methods and apparatus for managing thermal behavior in multichip packages
[patent_app_type] => utility
[patent_app_number] => 16/701739
[patent_app_country] => US
[patent_app_date] => 2019-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7013
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16701739
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/701739 | Methods and apparatus for managing thermal behavior in multichip packages | Dec 2, 2019 | Issued |
Array
(
[id] => 16965972
[patent_doc_number] => 20210217471
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-15
[patent_title] => METHODS AND SYSTEMS FOR ACCESSING MEMORY CELLS
[patent_app_type] => utility
[patent_app_number] => 16/771657
[patent_app_country] => US
[patent_app_date] => 2019-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15137
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16771657
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/771657 | Methods and systems for accessing memory cells | Dec 2, 2019 | Issued |
Array
(
[id] => 16047611
[patent_doc_number] => 10685684
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-16
[patent_title] => Power delivery circuitry
[patent_app_type] => utility
[patent_app_number] => 16/697719
[patent_app_country] => US
[patent_app_date] => 2019-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 5266
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16697719
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/697719 | Power delivery circuitry | Nov 26, 2019 | Issued |
Array
(
[id] => 16858526
[patent_doc_number] => 20210159271
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-27
[patent_title] => FORMING AN MRAM DEVICE OVER A TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 16/695601
[patent_app_country] => US
[patent_app_date] => 2019-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6037
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16695601
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/695601 | Forming an MRAM device over a transistor | Nov 25, 2019 | Issued |
Array
(
[id] => 16858105
[patent_doc_number] => 20210158850
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-27
[patent_title] => NANOSECOND NON-DESTRUCTIVELY ERASABLE MAGNETORESISTIVE RANDOM-ACCESS MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/693469
[patent_app_country] => US
[patent_app_date] => 2019-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4521
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693469
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/693469 | Nanosecond non-destructively erasable magnetoresistive random-access memory | Nov 24, 2019 | Issued |
Array
(
[id] => 16858118
[patent_doc_number] => 20210158863
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-27
[patent_title] => MEMORY WITH PARTIAL BANK REFRESH
[patent_app_type] => utility
[patent_app_number] => 16/693949
[patent_app_country] => US
[patent_app_date] => 2019-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9408
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -27
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693949
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/693949 | Memory with partial bank refresh | Nov 24, 2019 | Issued |
Array
(
[id] => 16279914
[patent_doc_number] => 10762952
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-01
[patent_title] => Memory circuit configuration
[patent_app_type] => utility
[patent_app_number] => 16/691175
[patent_app_country] => US
[patent_app_date] => 2019-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 16769
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691175
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/691175 | Memory circuit configuration | Nov 20, 2019 | Issued |
Array
(
[id] => 17636848
[patent_doc_number] => 11347572
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-31
[patent_title] => Methods and apparatus for data pipelines between cloud computing platforms
[patent_app_type] => utility
[patent_app_number] => 16/690157
[patent_app_country] => US
[patent_app_date] => 2019-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 20382
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690157
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/690157 | Methods and apparatus for data pipelines between cloud computing platforms | Nov 20, 2019 | Issued |
Array
(
[id] => 16593649
[patent_doc_number] => 10902925
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-01-26
[patent_title] => Peak and average current reduction for open block condition
[patent_app_type] => utility
[patent_app_number] => 16/688587
[patent_app_country] => US
[patent_app_date] => 2019-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 22
[patent_no_of_words] => 12513
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16688587
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/688587 | Peak and average current reduction for open block condition | Nov 18, 2019 | Issued |
Array
(
[id] => 17339193
[patent_doc_number] => 20220005524
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-06
[patent_title] => Memory Device and Method for Its Operation
[patent_app_type] => utility
[patent_app_number] => 17/293693
[patent_app_country] => US
[patent_app_date] => 2019-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4576
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17293693
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/293693 | Memory device and method for its operation | Nov 13, 2019 | Issued |
Array
(
[id] => 16865632
[patent_doc_number] => 11024383
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-06-01
[patent_title] => Memory device, memory controller, and storage device including memory device and memory controller
[patent_app_type] => utility
[patent_app_number] => 16/678028
[patent_app_country] => US
[patent_app_date] => 2019-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 17
[patent_no_of_words] => 15007
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16678028
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/678028 | Memory device, memory controller, and storage device including memory device and memory controller | Nov 7, 2019 | Issued |