
Fetsum Abraham
Examiner (ID: 18739)
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2508, 2515, 2818, 2811, 2826, 2825 |
| Total Applications | 1055 |
| Issued Applications | 981 |
| Pending Applications | 32 |
| Abandoned Applications | 42 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 15597055
[patent_doc_number] => 20200075062
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-05
[patent_title] => Power Management Integrated Circuit with Dual Power Feed
[patent_app_type] => utility
[patent_app_number] => 16/676846
[patent_app_country] => US
[patent_app_date] => 2019-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5304
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16676846
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/676846 | Power management integrated circuit with dual power feed | Nov 6, 2019 | Issued |
Array
(
[id] => 17166312
[patent_doc_number] => 11152425
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-19
[patent_title] => Cross-point spin-transfer torque magnetoresistive memory array and method of making the same
[patent_app_type] => utility
[patent_app_number] => 16/666967
[patent_app_country] => US
[patent_app_date] => 2019-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 27
[patent_no_of_words] => 11688
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666967
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/666967 | Cross-point spin-transfer torque magnetoresistive memory array and method of making the same | Oct 28, 2019 | Issued |
Array
(
[id] => 15530849
[patent_doc_number] => 20200057730
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-20
[patent_title] => METHODS OF MEMORY ADDRESS VERIFICATION AND MEMORY DEVICES EMPLOYING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/662386
[patent_app_country] => US
[patent_app_date] => 2019-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4940
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16662386
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/662386 | Methods of memory address verification and memory devices employing the same | Oct 23, 2019 | Issued |
Array
(
[id] => 15839971
[patent_doc_number] => 20200135268
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-30
[patent_title] => METHOD AND SYSTEM TO BALANCE GROUND BOUNCE
[patent_app_type] => utility
[patent_app_number] => 16/659055
[patent_app_country] => US
[patent_app_date] => 2019-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5876
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16659055
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/659055 | Method and system to balance ground bounce | Oct 20, 2019 | Issued |
Array
(
[id] => 16958906
[patent_doc_number] => 11062783
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-13
[patent_title] => Memory device
[patent_app_type] => utility
[patent_app_number] => 16/657253
[patent_app_country] => US
[patent_app_date] => 2019-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 15
[patent_no_of_words] => 8670
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16657253
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/657253 | Memory device | Oct 17, 2019 | Issued |
Array
(
[id] => 17900788
[patent_doc_number] => 20220310450
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-29
[patent_title] => STACKED SEMICONDUCTOR, WAFER STACK, METHOD OF MANUFACTURING STACKED SEMICONDUCTOR, ASSISTANCE DEVICE, AND PROGRAM
[patent_app_type] => utility
[patent_app_number] => 17/765997
[patent_app_country] => US
[patent_app_date] => 2019-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6075
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17765997
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/765997 | Stacked semiconductor, wafer stack, method of manufacturing stacked semiconductor, assistance device, and program | Oct 8, 2019 | Issued |
Array
(
[id] => 15776013
[patent_doc_number] => 20200119024
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-16
[patent_title] => MEMORY CELL
[patent_app_type] => utility
[patent_app_number] => 16/594311
[patent_app_country] => US
[patent_app_date] => 2019-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2941
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16594311
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/594311 | Memory cell | Oct 6, 2019 | Issued |
Array
(
[id] => 16699134
[patent_doc_number] => 10949738
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-03-16
[patent_title] => Tunable memristor noise control
[patent_app_type] => utility
[patent_app_number] => 16/593391
[patent_app_country] => US
[patent_app_date] => 2019-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 5208
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16593391
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/593391 | Tunable memristor noise control | Oct 3, 2019 | Issued |
Array
(
[id] => 15440151
[patent_doc_number] => 20200034259
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-30
[patent_title] => MEMORY MODULE, MEMORY SYSTEM INCLUDING THE SAME AND OPERATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/593700
[patent_app_country] => US
[patent_app_date] => 2019-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6430
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16593700
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/593700 | Memory module, memory system including the same and operation method thereof | Oct 3, 2019 | Issued |
Array
(
[id] => 16424803
[patent_doc_number] => 20200350001
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-05
[patent_title] => SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/590107
[patent_app_country] => US
[patent_app_date] => 2019-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6709
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16590107
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/590107 | Semiconductor devices | Sep 30, 2019 | Issued |
Array
(
[id] => 16272034
[patent_doc_number] => 20200273522
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-27
[patent_title] => VERTICAL MEMORY DEVICE AND AN OPERATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/581917
[patent_app_country] => US
[patent_app_date] => 2019-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10215
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16581917
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/581917 | Vertical memory device and an operating method thereof | Sep 24, 2019 | Issued |
Array
(
[id] => 16047615
[patent_doc_number] => 10685686
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-16
[patent_title] => Power switch control for dual power supply
[patent_app_type] => utility
[patent_app_number] => 16/582029
[patent_app_country] => US
[patent_app_date] => 2019-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 16
[patent_no_of_words] => 9839
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16582029
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/582029 | Power switch control for dual power supply | Sep 24, 2019 | Issued |
Array
(
[id] => 15331071
[patent_doc_number] => 20200005865
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-02
[patent_title] => CONTROLLING AGGREGATE SIGNAL AMPLITUDE FROM DEVICE ARRAYS BY SEGMENTATION AND TIME-GATING
[patent_app_type] => utility
[patent_app_number] => 16/565951
[patent_app_country] => US
[patent_app_date] => 2019-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4739
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16565951
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/565951 | Controlling aggregate signal amplitude from device arrays by segmentation and time-gating | Sep 9, 2019 | Issued |
Array
(
[id] => 16802105
[patent_doc_number] => 10997049
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-04
[patent_title] => Memory system
[patent_app_type] => utility
[patent_app_number] => 16/566277
[patent_app_country] => US
[patent_app_date] => 2019-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 20
[patent_no_of_words] => 13223
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16566277
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/566277 | Memory system | Sep 9, 2019 | Issued |
Array
(
[id] => 17231976
[patent_doc_number] => 20210358533
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-18
[patent_title] => A CONTINUOUS THIN FILM OF A METAL CHALCOGENIDE
[patent_app_type] => utility
[patent_app_number] => 17/273990
[patent_app_country] => US
[patent_app_date] => 2019-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7067
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17273990
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/273990 | Continuous thin film of a metal chalcogenide | Sep 5, 2019 | Issued |
Array
(
[id] => 16495813
[patent_doc_number] => 10861865
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-08
[patent_title] => Semiconductor storage device
[patent_app_type] => utility
[patent_app_number] => 16/561917
[patent_app_country] => US
[patent_app_date] => 2019-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 17
[patent_no_of_words] => 14264
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16561917
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/561917 | Semiconductor storage device | Sep 4, 2019 | Issued |
Array
(
[id] => 16566626
[patent_doc_number] => 10892000
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-01-12
[patent_title] => Semiconductor memory device
[patent_app_type] => utility
[patent_app_number] => 16/559689
[patent_app_country] => US
[patent_app_date] => 2019-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 12344
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16559689
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/559689 | Semiconductor memory device | Sep 3, 2019 | Issued |
Array
(
[id] => 16417635
[patent_doc_number] => 10825535
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-11-03
[patent_title] => Intra-code word wear leveling techniques
[patent_app_type] => utility
[patent_app_number] => 16/553977
[patent_app_country] => US
[patent_app_date] => 2019-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 14657
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553977
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/553977 | Intra-code word wear leveling techniques | Aug 27, 2019 | Issued |
Array
(
[id] => 16677001
[patent_doc_number] => 20210065767
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-04
[patent_title] => MEMORY WITH ARTIFICIAL INTELLIGENCE MODE
[patent_app_type] => utility
[patent_app_number] => 16/553452
[patent_app_country] => US
[patent_app_date] => 2019-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15685
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553452
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/553452 | Memory with artificial intelligence mode | Aug 27, 2019 | Issued |
Array
(
[id] => 16132001
[patent_doc_number] => 10699767
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-30
[patent_title] => Memory device and operating method thereof
[patent_app_type] => utility
[patent_app_number] => 16/554043
[patent_app_country] => US
[patent_app_date] => 2019-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 24
[patent_no_of_words] => 13278
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16554043
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/554043 | Memory device and operating method thereof | Aug 27, 2019 | Issued |