Search

Fetsum Abraham

Examiner (ID: 18739)

Most Active Art Unit
2826
Art Unit(s)
2508, 2515, 2818, 2811, 2826, 2825
Total Applications
1055
Issued Applications
981
Pending Applications
32
Abandoned Applications
42

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15981987 [patent_doc_number] => 10671321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Data storage device, operation method for preventing read disturbance thereof, and storage system using the same [patent_app_type] => utility [patent_app_number] => 16/155483 [patent_app_country] => US [patent_app_date] => 2018-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6647 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16155483 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/155483
Data storage device, operation method for preventing read disturbance thereof, and storage system using the same Oct 8, 2018 Issued
Array ( [id] => 16347756 [patent_doc_number] => 20200312407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => RESISTIVE MEMORY DEVICES BASED ON METAL COORDINATED REDOX ACTIVE LIGANDS [patent_app_type] => utility [patent_app_number] => 16/651660 [patent_app_country] => US [patent_app_date] => 2018-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16651660 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/651660
Resistive memory devices based on metal coordinated redox active ligands Sep 30, 2018 Issued
Array ( [id] => 15169571 [patent_doc_number] => 10490288 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-26 [patent_title] => Page-level reference voltage parameterization for solid statesolid state storage devices [patent_app_type] => utility [patent_app_number] => 16/144655 [patent_app_country] => US [patent_app_date] => 2018-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9232 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16144655 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/144655
Page-level reference voltage parameterization for solid statesolid state storage devices Sep 26, 2018 Issued
Array ( [id] => 14285475 [patent_doc_number] => 20190140022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => MEMORY DEVICES HAVING CROSSPOINT MEMORY ARRAYS THEREIN WITH MULTI-LEVEL WORD LINE AND BIT LINE STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/135315 [patent_app_country] => US [patent_app_date] => 2018-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12090 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16135315 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/135315
Memory devices having crosspoint memory arrays therein with multi-level word line and bit line structures Sep 18, 2018 Issued
Array ( [id] => 15487995 [patent_doc_number] => 10559352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-11 [patent_title] => Bitline-driven sense amplifier clocking scheme [patent_app_type] => utility [patent_app_number] => 16/134937 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7351 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134937 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134937
Bitline-driven sense amplifier clocking scheme Sep 17, 2018 Issued
Array ( [id] => 15077209 [patent_doc_number] => 10468099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-05 [patent_title] => Circuit structure and driving method thereof, chip and authentication method thereof, and electronic device [patent_app_type] => utility [patent_app_number] => 16/132931 [patent_app_country] => US [patent_app_date] => 2018-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 10249 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16132931 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/132931
Circuit structure and driving method thereof, chip and authentication method thereof, and electronic device Sep 16, 2018 Issued
Array ( [id] => 13868753 [patent_doc_number] => 20190030717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => SAFETY SYSTEM FOR INTEGRATED HUMAN/ROBOTIC ENVIRONMENTS [patent_app_type] => utility [patent_app_number] => 16/133414 [patent_app_country] => US [patent_app_date] => 2018-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16133414 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/133414
Safety system for integrated human/robotic environments Sep 16, 2018 Issued
Array ( [id] => 15732929 [patent_doc_number] => 10614897 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-04-07 [patent_title] => System and method for high performance sequential read by decoupling of inter-cell interference for NAND flash memories [patent_app_type] => utility [patent_app_number] => 16/130757 [patent_app_country] => US [patent_app_date] => 2018-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9119 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16130757 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/130757
System and method for high performance sequential read by decoupling of inter-cell interference for NAND flash memories Sep 12, 2018 Issued
Array ( [id] => 13740179 [patent_doc_number] => 20180374559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => COLUMN REPAIR IN MEMORY [patent_app_type] => utility [patent_app_number] => 16/119856 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11139 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16119856 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/119856
Column repair in memory Aug 30, 2018 Issued
Array ( [id] => 14024859 [patent_doc_number] => 20190074423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => FOIL TRANSDUCER AND VALVE [patent_app_type] => utility [patent_app_number] => 16/116031 [patent_app_country] => US [patent_app_date] => 2018-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16116031 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/116031
Foil transducer and valve Aug 28, 2018 Issued
Array ( [id] => 16744986 [patent_doc_number] => 10969974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Power-based dynamic adjustment of memory module bandwidth [patent_app_type] => utility [patent_app_number] => 16/112461 [patent_app_country] => US [patent_app_date] => 2018-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9386 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16112461 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/112461
Power-based dynamic adjustment of memory module bandwidth Aug 23, 2018 Issued
Array ( [id] => 14706615 [patent_doc_number] => 10381065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Performing logical operations using sensing circuitry [patent_app_type] => utility [patent_app_number] => 16/111049 [patent_app_country] => US [patent_app_date] => 2018-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 15695 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111049 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/111049
Performing logical operations using sensing circuitry Aug 22, 2018 Issued
Array ( [id] => 15640755 [patent_doc_number] => 10593379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Memory controller with staggered request signal output [patent_app_type] => utility [patent_app_number] => 16/109607 [patent_app_country] => US [patent_app_date] => 2018-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6761 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16109607 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/109607
Memory controller with staggered request signal output Aug 21, 2018 Issued
Array ( [id] => 13597745 [patent_doc_number] => 20180350421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => BOOSTING A DIGIT LINE VOLTAGE FOR A WRITE OPERATION [patent_app_type] => utility [patent_app_number] => 16/102526 [patent_app_country] => US [patent_app_date] => 2018-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16102526 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/102526
Boosting a digit line voltage for a write operation Aug 12, 2018 Issued
Array ( [id] => 16272242 [patent_doc_number] => 20200273730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => SEMICONDUCTOR MANUFACTURING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/637639 [patent_app_country] => US [patent_app_date] => 2018-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3514 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16637639 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/637639
Semiconductor manufacturing apparatus Aug 8, 2018 Issued
Array ( [id] => 14752505 [patent_doc_number] => 20190259426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => MEMORY MODULE AND MEMORY SYSTEM HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 16/050134 [patent_app_country] => US [patent_app_date] => 2018-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16050134 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/050134
Memory module, memory system having the same and arrangement method of a board Jul 30, 2018 Issued
Array ( [id] => 15400703 [patent_doc_number] => 10541011 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-21 [patent_title] => Electronic device [patent_app_type] => utility [patent_app_number] => 16/049644 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 14826 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16049644 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/049644
Electronic device Jul 29, 2018 Issued
Array ( [id] => 15518949 [patent_doc_number] => 10566068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Semiconductor storage device and method for controlling semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/048392 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13446 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16048392 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/048392
Semiconductor storage device and method for controlling semiconductor storage device Jul 29, 2018 Issued
Array ( [id] => 18088572 [patent_doc_number] => 11538711 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Methods for edge trimming of semiconductor wafers and related apparatus [patent_app_type] => utility [patent_app_number] => 16/042597 [patent_app_country] => US [patent_app_date] => 2018-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 5187 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16042597 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/042597
Methods for edge trimming of semiconductor wafers and related apparatus Jul 22, 2018 Issued
Array ( [id] => 13542749 [patent_doc_number] => 20180322921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => QUANTUM MEMORY SYSTEMS AND QUANTUM REPEATER SYSTEMS COMPRISING DOPED POLYCRYSTALLINE CERAMIC OPTICAL DEVICES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/036297 [patent_app_country] => US [patent_app_date] => 2018-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036297 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/036297
Quantum memory systems and quantum repeater systems comprising doped polycrystalline ceramic optical devices and methods of manufacturing the same Jul 15, 2018 Issued
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