
Fetsum Abraham
Examiner (ID: 18739)
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2508, 2515, 2818, 2811, 2826, 2825 |
| Total Applications | 1055 |
| Issued Applications | 981 |
| Pending Applications | 32 |
| Abandoned Applications | 42 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 15060951
[patent_doc_number] => 10460787
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-10-29
[patent_title] => Selection circuit usable with ferroelectric memory
[patent_app_type] => utility
[patent_app_number] => 15/981564
[patent_app_country] => US
[patent_app_date] => 2018-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 2395
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981564
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981564 | Selection circuit usable with ferroelectric memory | May 15, 2018 | Issued |
Array
(
[id] => 14888681
[patent_doc_number] => 10424387
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-09-24
[patent_title] => Reducing widening of threshold voltage distributions in a memory device due to temperature change
[patent_app_type] => utility
[patent_app_number] => 15/981024
[patent_app_country] => US
[patent_app_date] => 2018-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 46
[patent_no_of_words] => 20450
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981024
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/981024 | Reducing widening of threshold voltage distributions in a memory device due to temperature change | May 15, 2018 | Issued |
Array
(
[id] => 14063497
[patent_doc_number] => 10236049
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-03-19
[patent_title] => Power reduction for a sensing operation of a memory cell
[patent_app_type] => utility
[patent_app_number] => 15/979178
[patent_app_country] => US
[patent_app_date] => 2018-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 15198
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15979178
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/979178 | Power reduction for a sensing operation of a memory cell | May 13, 2018 | Issued |
Array
(
[id] => 15045173
[patent_doc_number] => 20190333591
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-31
[patent_title] => PROGRAMMING METHOD, PROGRAMMING APPARATUS AND STORAGE MEDIUM FOR NON-VOLATILE MEMORY
[patent_app_type] => utility
[patent_app_number] => 15/964929
[patent_app_country] => US
[patent_app_date] => 2018-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4872
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15964929
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/964929 | Programming method, programming apparatus and storage medium for non-volatile memory | Apr 26, 2018 | Issued |
Array
(
[id] => 14721933
[patent_doc_number] => 20190252030
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-15
[patent_title] => SINGLE PULSE VERIFICATION OF MEMORY CELLS
[patent_app_type] => utility
[patent_app_number] => 15/963647
[patent_app_country] => US
[patent_app_date] => 2018-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10504
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15963647
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/963647 | Single pulse verification of memory cells | Apr 25, 2018 | Issued |
Array
(
[id] => 14768671
[patent_doc_number] => 10395736
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-27
[patent_title] => Resistive random access memory device
[patent_app_type] => utility
[patent_app_number] => 15/953829
[patent_app_country] => US
[patent_app_date] => 2018-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 7060
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15953829
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/953829 | Resistive random access memory device | Apr 15, 2018 | Issued |
Array
(
[id] => 16803532
[patent_doc_number] => 10998490
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-04
[patent_title] => Magnetic element
[patent_app_type] => utility
[patent_app_number] => 16/606927
[patent_app_country] => US
[patent_app_date] => 2018-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 20
[patent_no_of_words] => 8608
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16606927
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/606927 | Magnetic element | Apr 4, 2018 | Issued |
Array
(
[id] => 14735321
[patent_doc_number] => 10387060
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-20
[patent_title] => Memory device configuration commands
[patent_app_type] => utility
[patent_app_number] => 15/939459
[patent_app_country] => US
[patent_app_date] => 2018-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 5500
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15939459
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/939459 | Memory device configuration commands | Mar 28, 2018 | Issued |
Array
(
[id] => 13332489
[patent_doc_number] => 20180217782
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-02
[patent_title] => BUFFER OPERATIONS IN MEMORY
[patent_app_type] => utility
[patent_app_number] => 15/940351
[patent_app_country] => US
[patent_app_date] => 2018-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4964
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15940351
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/940351 | Buffer operations in memory | Mar 28, 2018 | Issued |
Array
(
[id] => 13935671
[patent_doc_number] => 20190051351
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-14
[patent_title] => NONVOLATILE MEMORY DEVICE AND OPERATING METHOD OF NONVOLATILE MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 15/936696
[patent_app_country] => US
[patent_app_date] => 2018-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8688
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15936696
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/936696 | Nonvolatile memory device and operating method of nonvolatile memory device | Mar 26, 2018 | Issued |
Array
(
[id] => 13754483
[patent_doc_number] => 10170193
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-01
[patent_title] => Apparatus and methods of operating memory for negative gate to body conditions
[patent_app_type] => utility
[patent_app_number] => 15/935126
[patent_app_country] => US
[patent_app_date] => 2018-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 17
[patent_no_of_words] => 10769
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15935126
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/935126 | Apparatus and methods of operating memory for negative gate to body conditions | Mar 25, 2018 | Issued |
Array
(
[id] => 14888611
[patent_doc_number] => 10424352
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-09-24
[patent_title] => Memory system and method for operating the same
[patent_app_type] => utility
[patent_app_number] => 15/934600
[patent_app_country] => US
[patent_app_date] => 2018-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 6453
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15934600
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/934600 | Memory system and method for operating the same | Mar 22, 2018 | Issued |
Array
(
[id] => 15286041
[patent_doc_number] => 10515689
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-24
[patent_title] => Memory circuit configuration and method
[patent_app_type] => utility
[patent_app_number] => 15/927044
[patent_app_country] => US
[patent_app_date] => 2018-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 16596
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15927044
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/927044 | Memory circuit configuration and method | Mar 19, 2018 | Issued |
Array
(
[id] => 13921107
[patent_doc_number] => 10204677
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-02-12
[patent_title] => Superconducting memory system with stacked drivers and differential transformers
[patent_app_type] => utility
[patent_app_number] => 15/923940
[patent_app_country] => US
[patent_app_date] => 2018-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10328
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15923940
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/923940 | Superconducting memory system with stacked drivers and differential transformers | Mar 15, 2018 | Issued |
Array
(
[id] => 14024103
[patent_doc_number] => 20190074045
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-07
[patent_title] => RESISTIVE MEMORY DEVICE HAVING REDUCED CHIP SIZE AND OPERATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 15/919876
[patent_app_country] => US
[patent_app_date] => 2018-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9206
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15919876
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/919876 | Resistive memory device having reduced chip size and operation method thereof | Mar 12, 2018 | Issued |
Array
(
[id] => 14737905
[patent_doc_number] => 10388361
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-08-20
[patent_title] => Differential amplifier schemes for sensing memory cells
[patent_app_type] => utility
[patent_app_number] => 15/920171
[patent_app_country] => US
[patent_app_date] => 2018-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 33284
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15920171
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/920171 | Differential amplifier schemes for sensing memory cells | Mar 12, 2018 | Issued |
Array
(
[id] => 14459323
[patent_doc_number] => 10325631
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-06-18
[patent_title] => Power management integrated circuit with dual power feed
[patent_app_type] => utility
[patent_app_number] => 15/918627
[patent_app_country] => US
[patent_app_date] => 2018-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5236
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15918627
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/918627 | Power management integrated circuit with dual power feed | Mar 11, 2018 | Issued |
Array
(
[id] => 13419445
[patent_doc_number] => 20180261265
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-09-13
[patent_title] => METHODS AND SYSTEMS FOR PARALLEL COLUMN TWIST INTERLEAVING
[patent_app_type] => utility
[patent_app_number] => 15/918395
[patent_app_country] => US
[patent_app_date] => 2018-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4578
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15918395
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/918395 | Methods and systems for parallel column twist interleaving | Mar 11, 2018 | Issued |
Array
(
[id] => 14049265
[patent_doc_number] => 20190080739
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-14
[patent_title] => MAGNETORESISTIVE ELEMENT AND MAGNETIC MEMORY
[patent_app_type] => utility
[patent_app_number] => 15/917081
[patent_app_country] => US
[patent_app_date] => 2018-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4803
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15917081
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/917081 | Magnetoresistive element and magnetic memory | Mar 8, 2018 | Issued |
Array
(
[id] => 12917248
[patent_doc_number] => 20180197592
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-12
[patent_title] => RESISTANCE CHANGE TYPE MEMORY
[patent_app_type] => utility
[patent_app_number] => 15/913407
[patent_app_country] => US
[patent_app_date] => 2018-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11171
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15913407
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/913407 | Resistance change type memory | Mar 5, 2018 | Issued |