Fiona Powers

Array ( [id] => 17469984 [patent_doc_number] => 11276466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/952858 [patent_app_country] => US [patent_app_date] => 2020-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 11267 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16952858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16677011 [patent_doc_number] => 20210065777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => SYSTEMS AND METHODS FOR PERFORMING DYNAMIC ON-CHIP CALIBRATION OF MEMORY CONTROL SIGNALS [patent_app_type] => utility [patent_app_number] => 17/098220 [patent_app_country] => US [patent_app_date] => 2020-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17098220 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17622963 [patent_doc_number] => 11342022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Low-power multi-stage/multi-segment content addressable memory device [patent_app_type] => utility [patent_app_number] => 17/088493 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 5727 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17716382 [patent_doc_number] => 11380380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Non volatile memory device with an asymmetric row decoder and method for selecting word lines [patent_app_type] => utility [patent_app_number] => 17/088060 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7271 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088060 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16958869 [patent_doc_number] => 11062746 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-13 [patent_title] => Computer program product and method and apparatus for activating flash devices [patent_app_type] => utility [patent_app_number] => 17/085640 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17085640 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17772170 [patent_doc_number] => 11404121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Methods for writing ternary content addressable memory devices [patent_app_type] => utility [patent_app_number] => 17/074789 [patent_app_country] => US [patent_app_date] => 2020-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4691 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074789 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17318517 [patent_doc_number] => 20210407567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => ELECTRONIC DEVICES EXECUTING ACTIVE OPERATION [patent_app_type] => utility [patent_app_number] => 17/071369 [patent_app_country] => US [patent_app_date] => 2020-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11376 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17071369 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17536470 [patent_doc_number] => 20220115079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => THRESHOLD VOLTAGE OFFSET BIN SELECTION BASED ON DIE FAMILY IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/070526 [patent_app_country] => US [patent_app_date] => 2020-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17070526 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17535283 [patent_doc_number] => 20220113892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => MULTI-LEVEL MEMORY PROGRAMMING AND READOUT [patent_app_type] => utility [patent_app_number] => 17/068369 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17068369 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17716413 [patent_doc_number] => 11380411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Threshold voltage drift tracking systems and methods [patent_app_type] => utility [patent_app_number] => 17/066997 [patent_app_country] => US [patent_app_date] => 2020-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7452 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17066997 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17246810 [patent_doc_number] => 20210366555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => VOLTAGE GENERATOR AND MEMORY DEVICE HAVING THE VOLTAGE GENERATOR [patent_app_type] => utility [patent_app_number] => 17/064261 [patent_app_country] => US [patent_app_date] => 2020-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10822 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17064261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17040392 [patent_doc_number] => 20210257028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => PERFORMING A PROGRAM OPERATION BASED ON A HIGH VOLTAGE PULSE TO SECURELY ERASE DATA [patent_app_type] => utility [patent_app_number] => 17/062453 [patent_app_country] => US [patent_app_date] => 2020-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17062453 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17606918 [patent_doc_number] => 11335410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Memory device and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/038221 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 17412 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17038221 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17326295 [patent_doc_number] => 11217320 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-01-04 [patent_title] => Bin placement according to program-erase cycles [patent_app_type] => utility [patent_app_number] => 16/948688 [patent_app_country] => US [patent_app_date] => 2020-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 11856 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16948688 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18174940 [patent_doc_number] => 11574657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Memory device, sense amplifier and method for mismatch compensation [patent_app_type] => utility [patent_app_number] => 17/035609 [patent_app_country] => US [patent_app_date] => 2020-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17035609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17508823 [patent_doc_number] => 20220101926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => NON-VOLATILE MEMORY WITH SWITCHABLE ERASE METHODS [patent_app_type] => utility [patent_app_number] => 17/034086 [patent_app_country] => US [patent_app_date] => 2020-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17034086 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16995177 [patent_doc_number] => 20210233597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/026713 [patent_app_country] => US [patent_app_date] => 2020-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17026713 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17158788 [patent_doc_number] => 20210319839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => MEMORY DEVICE FOR WRITE OPERATION INCLUDING VERIFICATION AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/025689 [patent_app_country] => US [patent_app_date] => 2020-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13304 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17025689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16560119 [patent_doc_number] => 20210005268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => NONVOLATILE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/023556 [patent_app_country] => US [patent_app_date] => 2020-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17023556 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17295183 [patent_doc_number] => 20210391022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => POWER CONTROL METHOD FOR A MEMORY STORAGE DEVICE AND A MEMORY STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/020887 [patent_app_country] => US [patent_app_date] => 2020-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17020887 [rel_patent_id] =>[rel_patent_doc_number] =>)