Search

Fiona Powers

Examiner (ID: 3954)

Most Active Art Unit
1626
Art Unit(s)
2899, 1201, 1613, 1626
Total Applications
2100
Issued Applications
1653
Pending Applications
85
Abandoned Applications
362

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19712357 [patent_doc_number] => 20250022499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD [patent_app_type] => utility [patent_app_number] => 18/403739 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8602 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18403739 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/403739
MEMORY SYSTEM AND OPERATING METHOD Jan 3, 2024 Pending
Array ( [id] => 19160856 [patent_doc_number] => 20240153563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND STORAGE SYSTEM INCLUDING SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/545144 [patent_app_country] => US [patent_app_date] => 2023-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14319 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18545144 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/545144
Semiconductor memory device and storage system including semiconductor memory device Dec 18, 2023 Issued
Array ( [id] => 19788253 [patent_doc_number] => 20250061932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => ELECTRONIC DEVICE AND ELECTRONIC SYSTEM FOR PERFORMING PHASE ADJUSTMENT OPERATION [patent_app_type] => utility [patent_app_number] => 18/541678 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18541678 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/541678
Electronic device and electronic system for performing phase adjustment operation Dec 14, 2023 Issued
Array ( [id] => 19100784 [patent_doc_number] => 20240120012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => MULTI-SAMPLED, CHARGE-SHARING THERMOMETER IN MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/539798 [patent_app_country] => US [patent_app_date] => 2023-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9272 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18539798 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/539798
Multi-sampled, charge-sharing thermometer in memory device Dec 13, 2023 Issued
Array ( [id] => 19348920 [patent_doc_number] => 20240257884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/538457 [patent_app_country] => US [patent_app_date] => 2023-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18538457 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/538457
Semiconductor integrated circuit, semiconductor device, and semiconductor memory device Dec 12, 2023 Issued
Array ( [id] => 19237042 [patent_doc_number] => 20240194237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => FERROELECTRIC FIELD EFFECT TRANSISTORS BASED APPROACH FOR EUCLIDEAN DISTANCE CALCULATION IN NEUROMORPHIC HARDWARE [patent_app_type] => utility [patent_app_number] => 18/534269 [patent_app_country] => US [patent_app_date] => 2023-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18534269 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/534269
FERROELECTRIC FIELD EFFECT TRANSISTORS BASED APPROACH FOR EUCLIDEAN DISTANCE CALCULATION IN NEUROMORPHIC HARDWARE Dec 7, 2023 Pending
Array ( [id] => 19634324 [patent_doc_number] => 20240412773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => SEMICONDUCTOR MEMORY DEVICES HAVING ENHANCED SUB-WORD LINE DRIVERS THEREIN [patent_app_type] => utility [patent_app_number] => 18/533788 [patent_app_country] => US [patent_app_date] => 2023-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18533788 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/533788
SEMICONDUCTOR MEMORY DEVICES HAVING ENHANCED SUB-WORD LINE DRIVERS THEREIN Dec 7, 2023 Pending
Array ( [id] => 19236033 [patent_doc_number] => 20240193228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => METHOD FOR MAPPING AN INPUT VECTOR TO AN OUTPUT VECTOR BY MEANS OF A MATRIX CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/532826 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4311 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18532826 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/532826
Method for mapping an input vector to an output vector by means of a matrix circuit Dec 6, 2023 Issued
Array ( [id] => 19934856 [patent_doc_number] => 12308064 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-05-20 [patent_title] => Random swap injection [patent_app_type] => utility [patent_app_number] => 18/533111 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10818 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18533111 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/533111
Random swap injection Dec 6, 2023 Issued
Array ( [id] => 20332573 [patent_doc_number] => 12462857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Nonvolatile memory package, storage device including the same, and method of operating thereof [patent_app_type] => utility [patent_app_number] => 18/529619 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 8048 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18529619 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/529619
Nonvolatile memory package, storage device including the same, and method of operating thereof Dec 4, 2023 Issued
Array ( [id] => 19866004 [patent_doc_number] => 20250104790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => Voltage Ramp Memory Calibration [patent_app_type] => utility [patent_app_number] => 18/525088 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11306 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525088 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/525088
Voltage ramp memory calibration Nov 29, 2023 Issued
Array ( [id] => 19052972 [patent_doc_number] => 20240094941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 18/520612 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10308 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520612 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520612
Memory system Nov 27, 2023 Issued
Array ( [id] => 20161144 [patent_doc_number] => 12387777 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Refresh circuit and semiconductor memory device including the same [patent_app_type] => utility [patent_app_number] => 18/521851 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521851 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/521851
Refresh circuit and semiconductor memory device including the same Nov 27, 2023 Issued
Array ( [id] => 19781314 [patent_doc_number] => 12230352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Memory device, memory cell read circuit, and control method for mismatch compensation [patent_app_type] => utility [patent_app_number] => 18/518578 [patent_app_country] => US [patent_app_date] => 2023-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518578 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518578
Memory device, memory cell read circuit, and control method for mismatch compensation Nov 22, 2023 Issued
Array ( [id] => 19269048 [patent_doc_number] => 20240212752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => THRESHOLD COMPENSATED DETECTOR FOR MEMORY SENSE [patent_app_type] => utility [patent_app_number] => 18/518126 [patent_app_country] => US [patent_app_date] => 2023-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518126 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518126
Threshold compensated detector for memory sense Nov 21, 2023 Issued
Array ( [id] => 20530176 [patent_doc_number] => 12548617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-10 [patent_title] => DRAM circuit [patent_app_type] => utility [patent_app_number] => 18/518302 [patent_app_country] => US [patent_app_date] => 2023-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 1385 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518302 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518302
DRAM circuit Nov 21, 2023 Issued
Array ( [id] => 19205861 [patent_doc_number] => 20240177760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => PROBABILISTIC DATA INTEGRITY SCANS USING RISK FACTOR ESTIMATION [patent_app_type] => utility [patent_app_number] => 18/507872 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8016 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507872 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/507872
Probabilistic data integrity scans using risk factor estimation Nov 12, 2023 Issued
Array ( [id] => 19175837 [patent_doc_number] => 20240161811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => LATCH TYPE SENSE AMPLIFIER FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/387476 [patent_app_country] => US [patent_app_date] => 2023-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18387476 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/387476
Latch type sense amplifier for non-volatile memory Nov 6, 2023 Issued
Array ( [id] => 18943166 [patent_doc_number] => 20240038305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/485630 [patent_app_country] => US [patent_app_date] => 2023-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 423 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18485630 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/485630
Semiconductor storage device Oct 11, 2023 Issued
Array ( [id] => 19085932 [patent_doc_number] => 20240112733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => METHOD FOR INFORMATION STORAGE BASED ON HYBRID MATERIAL [patent_app_type] => utility [patent_app_number] => 18/477013 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4305 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18477013 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/477013
Method for information storage based on hybrid material Sep 27, 2023 Issued
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