
Fiona Powers
Examiner (ID: 3954)
| Most Active Art Unit | 1626 |
| Art Unit(s) | 2899, 1201, 1613, 1626 |
| Total Applications | 2100 |
| Issued Applications | 1653 |
| Pending Applications | 85 |
| Abandoned Applications | 362 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12101920
[patent_doc_number] => 09859018
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-01-02
[patent_title] => 'Physically unclonable function based on domain wall memory and method of use'
[patent_app_type] => utility
[patent_app_number] => 15/330829
[patent_app_country] => US
[patent_app_date] => 2016-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 29
[patent_no_of_words] => 7951
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15330829
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/330829 | Physically unclonable function based on domain wall memory and method of use | Nov 6, 2016 | Issued |
Array
(
[id] => 12195362
[patent_doc_number] => 09899095
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-20
[patent_title] => 'Nonvolatile semiconductor memory device and control method thereof'
[patent_app_type] => utility
[patent_app_number] => 15/332424
[patent_app_country] => US
[patent_app_date] => 2016-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 20
[patent_no_of_words] => 16552
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15332424
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/332424 | Nonvolatile semiconductor memory device and control method thereof | Oct 23, 2016 | Issued |
Array
(
[id] => 11965708
[patent_doc_number] => 20170269861
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-21
[patent_title] => 'DYNAMIC RANK SWITCHING FOR LOW POWER VOLATILE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 15/299702
[patent_app_country] => US
[patent_app_date] => 2016-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4996
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15299702
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/299702 | Dynamic rank switching for low power volatile memory | Oct 20, 2016 | Issued |
Array
(
[id] => 11811351
[patent_doc_number] => 09715924
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-25
[patent_title] => 'Three dimensional non-volatile memory with current sensing programming status'
[patent_app_type] => utility
[patent_app_number] => 15/299338
[patent_app_country] => US
[patent_app_date] => 2016-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 36
[patent_no_of_words] => 18907
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15299338
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/299338 | Three dimensional non-volatile memory with current sensing programming status | Oct 19, 2016 | Issued |
Array
(
[id] => 12214673
[patent_doc_number] => 09911488
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-06
[patent_title] => 'Three dimensional non-volatile memory with shorting source line/bit line pairs'
[patent_app_type] => utility
[patent_app_number] => 15/299372
[patent_app_country] => US
[patent_app_date] => 2016-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 34
[patent_no_of_words] => 16322
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15299372
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/299372 | Three dimensional non-volatile memory with shorting source line/bit line pairs | Oct 19, 2016 | Issued |
Array
(
[id] => 12012452
[patent_doc_number] => 09805772
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-10-31
[patent_title] => 'Apparatuses and methods to selectively perform logical operations'
[patent_app_type] => utility
[patent_app_number] => 15/298798
[patent_app_country] => US
[patent_app_date] => 2016-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 12973
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15298798
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/298798 | Apparatuses and methods to selectively perform logical operations | Oct 19, 2016 | Issued |
Array
(
[id] => 11897925
[patent_doc_number] => 09767862
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-09-19
[patent_title] => 'Memory element and signal processing circuit'
[patent_app_type] => utility
[patent_app_number] => 15/291145
[patent_app_country] => US
[patent_app_date] => 2016-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 79
[patent_no_of_words] => 47149
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15291145
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/291145 | Memory element and signal processing circuit | Oct 11, 2016 | Issued |
Array
(
[id] => 11404851
[patent_doc_number] => 20170025389
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-26
[patent_title] => 'Three-Dimensional Mask-Programmed Read-Only Memory With Reserved Space'
[patent_app_type] => utility
[patent_app_number] => 15/284534
[patent_app_country] => US
[patent_app_date] => 2016-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5022
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15284534
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/284534 | Three-Dimensional Mask-Programmed Read-Only Memory With Reserved Space | Oct 2, 2016 | Abandoned |
Array
(
[id] => 11397764
[patent_doc_number] => 20170018299
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-19
[patent_title] => 'MTP-Thyristor Memory Cell Circuits and Methods of Operation'
[patent_app_type] => utility
[patent_app_number] => 15/283254
[patent_app_country] => US
[patent_app_date] => 2016-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 13475
[patent_no_of_claims] => 45
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15283254
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/283254 | MTP-thyristor memory cell circuits and methods of operation | Sep 29, 2016 | Issued |
Array
(
[id] => 11405062
[patent_doc_number] => 20170025600
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-26
[patent_title] => 'MAGNETORESISTIVE ELEMENT AND MAGNETIC MEMORY'
[patent_app_type] => utility
[patent_app_number] => 15/252128
[patent_app_country] => US
[patent_app_date] => 2016-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6219
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15252128
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/252128 | Magnetoresistive element and magnetic memory | Aug 29, 2016 | Issued |
Array
(
[id] => 11339752
[patent_doc_number] => 20160365509
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-15
[patent_title] => 'MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/248596
[patent_app_country] => US
[patent_app_date] => 2016-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 18294
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15248596
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/248596 | Memory device | Aug 25, 2016 | Issued |
Array
(
[id] => 11740476
[patent_doc_number] => 09705073
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-11
[patent_title] => 'Magnetic memory element and magnetic memory'
[patent_app_type] => utility
[patent_app_number] => 15/248472
[patent_app_country] => US
[patent_app_date] => 2016-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 25
[patent_no_of_words] => 9714
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15248472
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/248472 | Magnetic memory element and magnetic memory | Aug 25, 2016 | Issued |
Array
(
[id] => 12223137
[patent_doc_number] => 20180061497
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-03-01
[patent_title] => 'TEMPERATURE COMPENSATION IN MEMORY SENSING'
[patent_app_type] => utility
[patent_app_number] => 15/248692
[patent_app_country] => US
[patent_app_date] => 2016-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 11302
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15248692
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/248692 | Temperature compensation in memory sensing | Aug 25, 2016 | Issued |
Array
(
[id] => 13891657
[patent_doc_number] => 10198376
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-05
[patent_title] => Methods and apparatus for accelerating list comparison operations
[patent_app_type] => utility
[patent_app_number] => 15/220684
[patent_app_country] => US
[patent_app_date] => 2016-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4036
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15220684
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/220684 | Methods and apparatus for accelerating list comparison operations | Jul 26, 2016 | Issued |
Array
(
[id] => 13950303
[patent_doc_number] => 10210930
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-19
[patent_title] => Nonvolatile semiconductor storage apparatus
[patent_app_type] => utility
[patent_app_number] => 15/219232
[patent_app_country] => US
[patent_app_date] => 2016-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 39
[patent_no_of_words] => 15996
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15219232
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/219232 | Nonvolatile semiconductor storage apparatus | Jul 24, 2016 | Issued |
Array
(
[id] => 14735295
[patent_doc_number] => 10387046
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-20
[patent_title] => Bank to bank data transfer
[patent_app_type] => utility
[patent_app_number] => 15/189900
[patent_app_country] => US
[patent_app_date] => 2016-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10788
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15189900
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/189900 | Bank to bank data transfer | Jun 21, 2016 | Issued |
Array
(
[id] => 11475243
[patent_doc_number] => 20170062026
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-02
[patent_title] => 'SEMICONDUCTOR MEMORY AND MEMORY SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 15/168030
[patent_app_country] => US
[patent_app_date] => 2016-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 10036
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15168030
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/168030 | Semiconductor memory and memory system | May 27, 2016 | Issued |
Array
(
[id] => 11876210
[patent_doc_number] => 09747990
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-29
[patent_title] => 'Semiconductor device and control method of the semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 15/167596
[patent_app_country] => US
[patent_app_date] => 2016-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 27
[patent_no_of_words] => 9999
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15167596
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/167596 | Semiconductor device and control method of the semiconductor device | May 26, 2016 | Issued |
Array
(
[id] => 11637632
[patent_doc_number] => 09659612
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-05-23
[patent_title] => 'Semiconductor memory apparatus'
[patent_app_type] => utility
[patent_app_number] => 15/166780
[patent_app_country] => US
[patent_app_date] => 2016-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 7627
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15166780
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/166780 | Semiconductor memory apparatus | May 26, 2016 | Issued |
Array
(
[id] => 12989260
[patent_doc_number] => 20170345479
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-30
[patent_title] => Memories With Metal-Ferroelectric-Semiconductor (MFS) Transistors
[patent_app_type] => utility
[patent_app_number] => 15/166342
[patent_app_country] => US
[patent_app_date] => 2016-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5967
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15166342
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/166342 | Memories with metal-ferroelectric-semiconductor (MFS) transistors | May 26, 2016 | Issued |