Search

Fonya M. Long

Supervisory Patent Examiner (ID: 2418, Phone: (571)270-5096 , Office: P/3626 )

Most Active Art Unit
3689
Art Unit(s)
3626, 3682, 3689
Total Applications
329
Issued Applications
13
Pending Applications
39
Abandoned Applications
282

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20113180 [patent_doc_number] => 12363935 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Methods for forming multi-gate transistors [patent_app_type] => utility [patent_app_number] => 18/648876 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5505 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18648876 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/648876
Methods for forming multi-gate transistors Apr 28, 2024 Issued
Array ( [id] => 19349426 [patent_doc_number] => 20240258390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DEVICE, FINFET DEVICE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/636217 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11022 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18636217 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/636217
Semiconductor device, FinFET device and methods of forming the same Apr 14, 2024 Issued
Array ( [id] => 19349334 [patent_doc_number] => 20240258298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => INTEGRATED CIRCUIT WITH BACKSIDE POWER RAIL AND BACKSIDE INTERCONNECT [patent_app_type] => utility [patent_app_number] => 18/634782 [patent_app_country] => US [patent_app_date] => 2024-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18634782 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/634782
Integrated circuit with backside power rail and backside interconnect Apr 11, 2024 Issued
Array ( [id] => 19349349 [patent_doc_number] => 20240258313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/633722 [patent_app_country] => US [patent_app_date] => 2024-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18633722 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/633722
SEMICONDUCTOR DEVICE Apr 11, 2024 Pending
Array ( [id] => 19349334 [patent_doc_number] => 20240258298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => INTEGRATED CIRCUIT WITH BACKSIDE POWER RAIL AND BACKSIDE INTERCONNECT [patent_app_type] => utility [patent_app_number] => 18/634782 [patent_app_country] => US [patent_app_date] => 2024-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18634782 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/634782
Integrated circuit with backside power rail and backside interconnect Apr 11, 2024 Issued
Array ( [id] => 19875171 [patent_doc_number] => 12268058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Array substrate and display apparatus [patent_app_type] => utility [patent_app_number] => 18/628933 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 50 [patent_no_of_words] => 29101 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18628933 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/628933
Array substrate and display apparatus Apr 7, 2024 Issued
Array ( [id] => 19337127 [patent_doc_number] => 20240251557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/623909 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -31 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623909 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623909
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE Mar 31, 2024 Pending
Array ( [id] => 19349443 [patent_doc_number] => 20240258407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => MULTI-GATE DEVICES AND FABRICATING THE SAME WITH ETCH RATE MODULATION [patent_app_type] => utility [patent_app_number] => 18/623143 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11950 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623143 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623143
Multi-gate devices and fabricating the same with etch rate modulation Mar 31, 2024 Issued
Array ( [id] => 19335658 [patent_doc_number] => 20240250088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/600403 [patent_app_country] => US [patent_app_date] => 2024-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10123 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600403 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600403
Semiconductor device Mar 7, 2024 Issued
Array ( [id] => 19305954 [patent_doc_number] => 20240234534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => METHODS OF FORMING FINFET DEVICES [patent_app_type] => utility [patent_app_number] => 18/597952 [patent_app_country] => US [patent_app_date] => 2024-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7240 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597952 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597952
METHODS OF FORMING FINFET DEVICES Mar 6, 2024 Pending
Array ( [id] => 20163017 [patent_doc_number] => 12389674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Low resistance fill metal layer material as stressor in metal gates [patent_app_type] => utility [patent_app_number] => 18/594073 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 7338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594073 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/594073
Low resistance fill metal layer material as stressor in metal gates Mar 3, 2024 Issued
Array ( [id] => 20307221 [patent_doc_number] => 12453232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Lighting emitting stacked structure and display device having the same [patent_app_type] => utility [patent_app_number] => 18/595069 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 69 [patent_no_of_words] => 18976 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18595069 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/595069
Lighting emitting stacked structure and display device having the same Mar 3, 2024 Issued
Array ( [id] => 20163017 [patent_doc_number] => 12389674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Low resistance fill metal layer material as stressor in metal gates [patent_app_type] => utility [patent_app_number] => 18/594073 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 7338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594073 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/594073
Low resistance fill metal layer material as stressor in metal gates Mar 3, 2024 Issued
Array ( [id] => 20307221 [patent_doc_number] => 12453232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Lighting emitting stacked structure and display device having the same [patent_app_type] => utility [patent_app_number] => 18/595069 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 69 [patent_no_of_words] => 18976 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18595069 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/595069
Lighting emitting stacked structure and display device having the same Mar 3, 2024 Issued
Array ( [id] => 20163017 [patent_doc_number] => 12389674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Low resistance fill metal layer material as stressor in metal gates [patent_app_type] => utility [patent_app_number] => 18/594073 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 7338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594073 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/594073
Low resistance fill metal layer material as stressor in metal gates Mar 3, 2024 Issued
Array ( [id] => 19364189 [patent_doc_number] => 20240266223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => METHOD FOR FORMING LONG CHANNEL BACK-SIDE POWER RAIL DEVICE [patent_app_type] => utility [patent_app_number] => 18/439859 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11746 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439859 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/439859
Method for forming long channel back-side power rail device Feb 12, 2024 Issued
Array ( [id] => 19364189 [patent_doc_number] => 20240266223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => METHOD FOR FORMING LONG CHANNEL BACK-SIDE POWER RAIL DEVICE [patent_app_type] => utility [patent_app_number] => 18/439859 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11746 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439859 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/439859
Method for forming long channel back-side power rail device Feb 12, 2024 Issued
Array ( [id] => 19285981 [patent_doc_number] => 20240222458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH METAL GATE STACK [patent_app_type] => utility [patent_app_number] => 18/434028 [patent_app_country] => US [patent_app_date] => 2024-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10169 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18434028 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/434028
Semiconductor device structure with metal gate stack Feb 5, 2024 Issued
Array ( [id] => 19952814 [patent_doc_number] => 12324201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Integrated circuit device with source/drain barrier [patent_app_type] => utility [patent_app_number] => 18/433217 [patent_app_country] => US [patent_app_date] => 2024-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 2243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18433217 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/433217
Integrated circuit device with source/drain barrier Feb 4, 2024 Issued
Array ( [id] => 19928320 [patent_doc_number] => 12302631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Semiconductor device and method for forming the same [patent_app_type] => utility [patent_app_number] => 18/429734 [patent_app_country] => US [patent_app_date] => 2024-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 4586 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18429734 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/429734
Semiconductor device and method for forming the same Jan 31, 2024 Issued
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