![](/images/general/no_picture/200_user.png)
Fouzia Hye Solaiman
Examiner (ID: 5699)
Most Active Art Unit | 2659 |
Art Unit(s) | 2659 |
Total Applications | 48 |
Issued Applications | 4 |
Pending Applications | 41 |
Abandoned Applications | 3 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 9300186
[patent_doc_number] => 08648417
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-02-11
[patent_title] => 'LDMOS transistors with improved ESD capability'
[patent_app_type] => utility
[patent_app_number] => 13/632617
[patent_app_country] => US
[patent_app_date] => 2012-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 7200
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13632617
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/632617 | LDMOS transistors with improved ESD capability | Sep 30, 2012 | Issued |
Array
(
[id] => 8753480
[patent_doc_number] => 20130087784
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-11
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/632525
[patent_app_country] => US
[patent_app_date] => 2012-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 24701
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13632525
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/632525 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | Sep 30, 2012 | Abandoned |
Array
(
[id] => 8753534
[patent_doc_number] => 20130087838
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-11
[patent_title] => 'PHOTOELECTRIC CONVERSION DEVICE AND IMAGING SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/632733
[patent_app_country] => US
[patent_app_date] => 2012-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 16998
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13632733
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/632733 | Photoelectric conversion device and imaging system | Sep 30, 2012 | Issued |
Array
(
[id] => 8765058
[patent_doc_number] => 20130093095
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-18
[patent_title] => 'SEMICONDUCTOR MODULE'
[patent_app_type] => utility
[patent_app_number] => 13/613646
[patent_app_country] => US
[patent_app_date] => 2012-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6760
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13613646
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/613646 | Semiconductor module | Sep 12, 2012 | Issued |
Array
(
[id] => 8604364
[patent_doc_number] => 20130009676
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-10
[patent_title] => 'BIDIRECTIONAL SWITCHING DEVICE AND BIDIRECTIONAL SWITCHING CIRCUIT USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/613724
[patent_app_country] => US
[patent_app_date] => 2012-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7047
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13613724
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/613724 | Bidirectional switching device and bidirectional switching circuit using the same | Sep 12, 2012 | Issued |
Array
(
[id] => 9312345
[patent_doc_number] => 08653566
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-18
[patent_title] => 'Solid-state imaging device'
[patent_app_type] => utility
[patent_app_number] => 13/611953
[patent_app_country] => US
[patent_app_date] => 2012-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5552
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13611953
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/611953 | Solid-state imaging device | Sep 11, 2012 | Issued |
Array
(
[id] => 8519666
[patent_doc_number] => 20120319074
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-20
[patent_title] => 'RESISTANCE CHANGE DEVICE AND MEMORY CELL ARRAY'
[patent_app_type] => utility
[patent_app_number] => 13/598305
[patent_app_country] => US
[patent_app_date] => 2012-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5069
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13598305
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/598305 | Resistance change device and memory cell array | Aug 28, 2012 | Issued |
Array
(
[id] => 8720777
[patent_doc_number] => 20130071994
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-21
[patent_title] => 'METHOD OF INTEGRATING HIGH VOLTAGE DEVICES'
[patent_app_type] => utility
[patent_app_number] => 13/539339
[patent_app_country] => US
[patent_app_date] => 2012-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 4376
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13539339
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/539339 | METHOD OF INTEGRATING HIGH VOLTAGE DEVICES | Jun 29, 2012 | Abandoned |
Array
(
[id] => 8717940
[patent_doc_number] => 20130069157
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-21
[patent_title] => 'SEMICONDUCTOR CHIP INTEGRATING HIGH AND LOW VOLTAGE DEVICES'
[patent_app_type] => utility
[patent_app_number] => 13/539360
[patent_app_country] => US
[patent_app_date] => 2012-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 4370
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13539360
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/539360 | SEMICONDUCTOR CHIP INTEGRATING HIGH AND LOW VOLTAGE DEVICES | Jun 29, 2012 | Abandoned |
Array
(
[id] => 9334932
[patent_doc_number] => 20140061714
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-06
[patent_title] => 'P-N SEPARATION METAL FILL FOR FLIP CHIP LEDS'
[patent_app_type] => utility
[patent_app_number] => 14/112279
[patent_app_country] => US
[patent_app_date] => 2012-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3189
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14112279
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/112279 | P-N separation metal fill for flip chip LEDs | Apr 24, 2012 | Issued |
Array
(
[id] => 10132167
[patent_doc_number] => 09166009
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-10-20
[patent_title] => 'Semiconductor apparatus and method for making semiconductor apparatus'
[patent_app_type] => utility
[patent_app_number] => 14/112374
[patent_app_country] => US
[patent_app_date] => 2012-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 8017
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14112374
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/112374 | Semiconductor apparatus and method for making semiconductor apparatus | Apr 5, 2012 | Issued |
Array
(
[id] => 10837866
[patent_doc_number] => 08865538
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-21
[patent_title] => 'Method of integrating buried threshold voltage adjustment layers for CMOS processing'
[patent_app_type] => utility
[patent_app_number] => 13/436552
[patent_app_country] => US
[patent_app_date] => 2012-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 18
[patent_no_of_words] => 14042
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 328
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13436552
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/436552 | Method of integrating buried threshold voltage adjustment layers for CMOS processing | Mar 29, 2012 | Issued |
Array
(
[id] => 9065139
[patent_doc_number] => 20130256895
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-03
[patent_title] => 'STACKED SEMICONDUCTOR COMPONENTS WITH UNIVERSAL INTERCONNECT FOOTPRINT'
[patent_app_type] => utility
[patent_app_number] => 13/436124
[patent_app_country] => US
[patent_app_date] => 2012-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4732
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13436124
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/436124 | STACKED SEMICONDUCTOR COMPONENTS WITH UNIVERSAL INTERCONNECT FOOTPRINT | Mar 29, 2012 | Abandoned |
Array
(
[id] => 9589963
[patent_doc_number] => 08779507
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-15
[patent_title] => 'Insulated gate semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/435833
[patent_app_country] => US
[patent_app_date] => 2012-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 5726
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13435833
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/435833 | Insulated gate semiconductor device | Mar 29, 2012 | Issued |
Array
(
[id] => 8426639
[patent_doc_number] => 20120248514
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-04
[patent_title] => 'SOLID-STATE IMAGE SENSING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/435368
[patent_app_country] => US
[patent_app_date] => 2012-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 12325
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13435368
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/435368 | Solid-state image sensing device | Mar 29, 2012 | Issued |
Array
(
[id] => 8426693
[patent_doc_number] => 20120248568
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-04
[patent_title] => 'METHOD FOR CONTROLLING THE ELECTRICAL CONDUCTION BETWEEN TWO METALLIC PORTIONS AND ASSOCIATED DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/435304
[patent_app_country] => US
[patent_app_date] => 2012-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3485
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13435304
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/435304 | METHOD FOR CONTROLLING THE ELECTRICAL CONDUCTION BETWEEN TWO METALLIC PORTIONS AND ASSOCIATED DEVICE | Mar 29, 2012 | Abandoned |
Array
(
[id] => 8426533
[patent_doc_number] => 20120248408
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-04
[patent_title] => 'LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/436523
[patent_app_country] => US
[patent_app_date] => 2012-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3729
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13436523
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/436523 | Light-emitting device and method of manufacturing the same | Mar 29, 2012 | Issued |
Array
(
[id] => 9996602
[patent_doc_number] => 09041204
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-05-26
[patent_title] => 'Bonding pad structure with dense via array'
[patent_app_type] => utility
[patent_app_number] => 13/435702
[patent_app_country] => US
[patent_app_date] => 2012-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 16
[patent_no_of_words] => 2967
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13435702
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/435702 | Bonding pad structure with dense via array | Mar 29, 2012 | Issued |
Array
(
[id] => 8426705
[patent_doc_number] => 20120248581
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-04
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/435403
[patent_app_country] => US
[patent_app_date] => 2012-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5795
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13435403
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/435403 | Semiconductor device and manufacturing method thereof | Mar 29, 2012 | Issued |
Array
(
[id] => 9065134
[patent_doc_number] => 20130256890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-03
[patent_title] => 'SHALLOW VIA FORMATION BY OXIDATION'
[patent_app_type] => utility
[patent_app_number] => 13/435918
[patent_app_country] => US
[patent_app_date] => 2012-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3346
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13435918
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/435918 | Shallow via formation by oxidation | Mar 29, 2012 | Issued |