![](/images/general/no_picture/200_user.png)
Fouzia Hye Solaiman
Examiner (ID: 5699)
Most Active Art Unit | 2659 |
Art Unit(s) | 2659 |
Total Applications | 48 |
Issued Applications | 4 |
Pending Applications | 41 |
Abandoned Applications | 3 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
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[patent_doc_number] => 20120104559
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[patent_title] => 'Semiconductor Device Having Island Type Support Patterns'
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[patent_issue_date] => 2012-10-25
[patent_title] => 'LED PACKAGE STRUCTURE'
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Array
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[id] => 8718019
[patent_doc_number] => 20130069236
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[patent_kind] => A1
[patent_issue_date] => 2013-03-21
[patent_title] => 'EFFICIENT SEMICONDUCTOR DEVICE CELL LAYOUT UTILIZING UNDERLYING LOCAL CONNECTIVE FEATURES'
[patent_app_type] => utility
[patent_app_number] => 13/238294
[patent_app_country] => US
[patent_app_date] => 2011-09-21
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/238294 | Efficient semiconductor device cell layout utilizing underlying local connective features | Sep 20, 2011 | Issued |
Array
(
[id] => 8717937
[patent_doc_number] => 20130069154
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-21
[patent_title] => 'SEMICONDUCTOR CHIP INTEGRATING HIGH AND LOW VOLTAGE DEVICES'
[patent_app_type] => utility
[patent_app_number] => 13/237852
[patent_app_country] => US
[patent_app_date] => 2011-09-20
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/237852 | SEMICONDUCTOR CHIP INTEGRATING HIGH AND LOW VOLTAGE DEVICES | Sep 19, 2011 | Abandoned |
Array
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[patent_doc_number] => 20130072004
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[patent_title] => 'METHOD OF INTEGRATING HIGH VOLTAGE DEVICES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/237842 | Method of integrating high voltage devices | Sep 19, 2011 | Issued |
Array
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[patent_doc_number] => 20120319147
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[patent_issue_date] => 2012-12-20
[patent_title] => 'ORGANIC LIGHT EMITTING DIODE DISPLAY'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/237877 | Organic light emitting diode display | Sep 19, 2011 | Issued |
Array
(
[id] => 9818316
[patent_doc_number] => 08928105
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[patent_issue_date] => 2015-01-06
[patent_title] => 'Method and apparatus for thin film module with dotted interconnects and vias'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/638010 | Method and apparatus for thin film module with dotted interconnects and vias | May 26, 2011 | Issued |
Array
(
[id] => 8730278
[patent_doc_number] => 20130075847
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[patent_issue_date] => 2013-03-28
[patent_title] => 'MAGNETIC MEMORY'
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[patent_app_number] => 13/636318
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/636318 | MAGNETIC MEMORY | Mar 15, 2011 | Abandoned |
Array
(
[id] => 6104151
[patent_doc_number] => 20110186116
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-04
[patent_title] => 'METHOD FOR PRODUCING A SOLAR CELL HAVING A TWO-STAGE DOPING'
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[pdf_file] => publications/A1/0186/20110186116.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/055754 | METHOD FOR PRODUCING A SOLAR CELL HAVING A TWO-STAGE DOPING | Jul 26, 2009 | Abandoned |