
Francis J. Lorin
Examiner (ID: 6139)
| Most Active Art Unit | 1301 |
| Art Unit(s) | 1301, 1775, 2899, 1733 |
| Total Applications | 754 |
| Issued Applications | 659 |
| Pending Applications | 27 |
| Abandoned Applications | 68 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11592910
[patent_doc_number] => 20170117322
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-27
[patent_title] => 'METHOD OF FORMING A MEMORY DEVICE STRUCTURE AND MEMORY DEVICE STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 14/918736
[patent_app_country] => US
[patent_app_date] => 2015-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7504
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14918736
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/918736 | Method of forming a memory device structure and memory device structure | Oct 20, 2015 | Issued |
Array
(
[id] => 13043455
[patent_doc_number] => 10043870
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-08-07
[patent_title] => Method and structure to improve film stack with sensitive and reactive layers
[patent_app_type] => utility
[patent_app_number] => 14/918604
[patent_app_country] => US
[patent_app_date] => 2015-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2578
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14918604
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/918604 | Method and structure to improve film stack with sensitive and reactive layers | Oct 20, 2015 | Issued |
Array
(
[id] => 11862106
[patent_doc_number] => 09741798
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-22
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/871053
[patent_app_country] => US
[patent_app_date] => 2015-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 17
[patent_no_of_words] => 8924
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14871053
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/871053 | Semiconductor device | Sep 29, 2015 | Issued |
Array
(
[id] => 11518154
[patent_doc_number] => 20170085228
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-23
[patent_title] => 'ENCAPSULATED SEMICONDUCTOR DEVICE PACKAGE WITH HEATSINK OPENING, AND METHODS OF MANUFACTURE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/862944
[patent_app_country] => US
[patent_app_date] => 2015-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 16725
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14862944
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/862944 | Encapsulated semiconductor device package with heatsink opening, and methods of manufacture thereof | Sep 22, 2015 | Issued |
Array
(
[id] => 10748007
[patent_doc_number] => 20160094158
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-31
[patent_title] => 'METHOD FOR POWER STATION SIMULATION'
[patent_app_type] => utility
[patent_app_number] => 14/861119
[patent_app_country] => US
[patent_app_date] => 2015-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5916
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14861119
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/861119 | METHOD FOR POWER STATION SIMULATION | Sep 21, 2015 | Abandoned |
Array
(
[id] => 10659664
[patent_doc_number] => 20160005808
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-07
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME'
[patent_app_type] => utility
[patent_app_number] => 14/856155
[patent_app_country] => US
[patent_app_date] => 2015-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8594
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856155
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/856155 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME | Sep 15, 2015 | Abandoned |
Array
(
[id] => 10740739
[patent_doc_number] => 20160086890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-24
[patent_title] => 'WIRING AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/842239
[patent_app_country] => US
[patent_app_date] => 2015-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3944
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14842239
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/842239 | Wiring and method for manufacturing the same | Aug 31, 2015 | Issued |
Array
(
[id] => 13640855
[patent_doc_number] => 09847388
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-12-19
[patent_title] => High thermal budget compatible punch through stop integration using doped glass
[patent_app_type] => utility
[patent_app_number] => 14/842180
[patent_app_country] => US
[patent_app_date] => 2015-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 7194
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14842180
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/842180 | High thermal budget compatible punch through stop integration using doped glass | Aug 31, 2015 | Issued |
Array
(
[id] => 11273866
[patent_doc_number] => 20160336412
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-17
[patent_title] => 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/842680
[patent_app_country] => US
[patent_app_date] => 2015-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 5023
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14842680
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/842680 | Semiconductor structure and manufacturing method thereof | Aug 31, 2015 | Issued |
Array
(
[id] => 10718331
[patent_doc_number] => 20160064478
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-03
[patent_title] => 'SUPER-JUNCTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME AND SEMICONDUCTOR DEVICE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/841776
[patent_app_country] => US
[patent_app_date] => 2015-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5736
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14841776
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/841776 | Super-junction structure and method for manufacturing the same and semiconductor device thereof | Aug 31, 2015 | Issued |
Array
(
[id] => 10733072
[patent_doc_number] => 20160079222
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-17
[patent_title] => 'SEMICONDUCTOR DEVICE HAVING TERMINALS FORMED ON A CHIP PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/842630
[patent_app_country] => US
[patent_app_date] => 2015-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6193
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14842630
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/842630 | SEMICONDUCTOR DEVICE HAVING TERMINALS FORMED ON A CHIP PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS AND MANUFACTURING METHOD THEREOF | Aug 31, 2015 | Abandoned |
Array
(
[id] => 11071245
[patent_doc_number] => 20160268210
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-15
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/842545
[patent_app_country] => US
[patent_app_date] => 2015-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 3936
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14842545
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/842545 | Semiconductor device and method of manufacturing the same | Aug 31, 2015 | Issued |
Array
(
[id] => 12935737
[patent_doc_number] => 09831136
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-28
[patent_title] => Film thickness metrology
[patent_app_type] => utility
[patent_app_number] => 14/840540
[patent_app_country] => US
[patent_app_date] => 2015-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2878
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14840540
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/840540 | Film thickness metrology | Aug 30, 2015 | Issued |
Array
(
[id] => 10487071
[patent_doc_number] => 20150372091
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-24
[patent_title] => 'SEMICONDUCTOR CHIP CARRIERS WITH MONOLITHICALLY INTEGRATED QUANTUM DOT DEVICES AND METHOD OF MANUFACTURE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/839364
[patent_app_country] => US
[patent_app_date] => 2015-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 9371
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14839364
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/839364 | SEMICONDUCTOR CHIP CARRIERS WITH MONOLITHICALLY INTEGRATED QUANTUM DOT DEVICES AND METHOD OF MANUFACTURE THEREOF | Aug 27, 2015 | Abandoned |
Array
(
[id] => 10472462
[patent_doc_number] => 20150357478
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-10
[patent_title] => 'THIN FILM TRANSISTOR DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/830091
[patent_app_country] => US
[patent_app_date] => 2015-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6049
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14830091
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/830091 | Thin film transistor display panel and method of manufacturing the same | Aug 18, 2015 | Issued |
Array
(
[id] => 10464283
[patent_doc_number] => 20150349298
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-03
[patent_title] => 'DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/826451
[patent_app_country] => US
[patent_app_date] => 2015-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7624
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14826451
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/826451 | Display device and method of manufacturing the same | Aug 13, 2015 | Issued |
Array
(
[id] => 10464120
[patent_doc_number] => 20150349134
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-03
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/822230
[patent_app_country] => US
[patent_app_date] => 2015-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 55
[patent_figures_cnt] => 55
[patent_no_of_words] => 21248
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14822230
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/822230 | SEMICONDUCTOR DEVICE | Aug 9, 2015 | Abandoned |
Array
(
[id] => 10455458
[patent_doc_number] => 20150340473
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-26
[patent_title] => 'III-V Multi-Channel FinFETs'
[patent_app_type] => utility
[patent_app_number] => 14/814928
[patent_app_country] => US
[patent_app_date] => 2015-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2497
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14814928
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/814928 | III-V multi-channel FinFETs | Jul 30, 2015 | Issued |
Array
(
[id] => 11424828
[patent_doc_number] => 20170032974
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-02-02
[patent_title] => 'METHOD AND APPARATUS FOR CONTROLLED DOPANT INCORPORATION AND ACTIVATION IN A CHEMICAL VAPOR DEPOSITION SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 14/814153
[patent_app_country] => US
[patent_app_date] => 2015-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8829
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14814153
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/814153 | Method and apparatus for controlled dopant incorporation and activation in a chemical vapor deposition system | Jul 29, 2015 | Issued |
Array
(
[id] => 10448147
[patent_doc_number] => 20150333160
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-19
[patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/813413
[patent_app_country] => US
[patent_app_date] => 2015-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 23460
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14813413
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/813413 | Method for manufacturing semiconductor device | Jul 29, 2015 | Issued |