Francis N Nguyen
Examiner (ID: 14942)
Most Active Art Unit | 2674 |
Art Unit(s) | 2774, 2674 |
Total Applications | 207 |
Issued Applications | 164 |
Pending Applications | 29 |
Abandoned Applications | 14 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 4309932
[patent_doc_number] => 06326663
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-04
[patent_title] => 'Avalanche injection EEPROM memory cell with P-type control gate'
[patent_app_type] => 1
[patent_app_number] => 9/277441
[patent_app_country] => US
[patent_app_date] => 1999-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3429
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/326/06326663.pdf
[firstpage_image] =>[orig_patent_app_number] => 277441
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/277441 | Avalanche injection EEPROM memory cell with P-type control gate | Mar 25, 1999 | Issued |
Array
(
[id] => 5933396
[patent_doc_number] => 20020060343
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-23
[patent_title] => 'DIFFUSION RESISTOR/CAPACITOR (DRC) NON-ALIGNED MOSFET STRUCTURE'
[patent_app_type] => new
[patent_app_number] => 09/272433
[patent_app_country] => US
[patent_app_date] => 1999-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2720
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0060/20020060343.pdf
[firstpage_image] =>[orig_patent_app_number] => 09272433
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/272433 | DIFFUSION RESISTOR/CAPACITOR (DRC) NON-ALIGNED MOSFET STRUCTURE | Mar 18, 1999 | Abandoned |
Array
(
[id] => 4387701
[patent_doc_number] => 06278132
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-21
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 9/272701
[patent_app_country] => US
[patent_app_date] => 1999-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 50
[patent_no_of_words] => 14556
[patent_no_of_claims] => 60
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/278/06278132.pdf
[firstpage_image] =>[orig_patent_app_number] => 272701
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/272701 | Semiconductor device and method of manufacturing the same | Mar 17, 1999 | Issued |
Array
(
[id] => 1314232
[patent_doc_number] => 06614071
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-09-02
[patent_title] => 'Non-volatile semiconductor memory device'
[patent_app_type] => B1
[patent_app_number] => 09/270331
[patent_app_country] => US
[patent_app_date] => 1999-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 20
[patent_no_of_words] => 4215
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/614/06614071.pdf
[firstpage_image] =>[orig_patent_app_number] => 09270331
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/270331 | Non-volatile semiconductor memory device | Mar 15, 1999 | Issued |
Array
(
[id] => 1452218
[patent_doc_number] => 06455898
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-24
[patent_title] => 'Electrostatic discharge input protection for reducing input resistance'
[patent_app_type] => B1
[patent_app_number] => 09/267303
[patent_app_country] => US
[patent_app_date] => 1999-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 3822
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/455/06455898.pdf
[firstpage_image] =>[orig_patent_app_number] => 09267303
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/267303 | Electrostatic discharge input protection for reducing input resistance | Mar 14, 1999 | Issued |
Array
(
[id] => 4317761
[patent_doc_number] => 06316801
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-13
[patent_title] => 'Semiconductor device having capacitive element structure and multilevel interconnection structure and method of fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 9/262070
[patent_app_country] => US
[patent_app_date] => 1999-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 19460
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/316/06316801.pdf
[firstpage_image] =>[orig_patent_app_number] => 262070
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/262070 | Semiconductor device having capacitive element structure and multilevel interconnection structure and method of fabricating the same | Mar 3, 1999 | Issued |
Array
(
[id] => 4359245
[patent_doc_number] => 06291883
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-09-18
[patent_title] => 'Static random-access memory device having a local interconnect structure'
[patent_app_type] => 1
[patent_app_number] => 9/261593
[patent_app_country] => US
[patent_app_date] => 1999-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3565
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/291/06291883.pdf
[firstpage_image] =>[orig_patent_app_number] => 261593
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/261593 | Static random-access memory device having a local interconnect structure | Mar 2, 1999 | Issued |
Array
(
[id] => 4373359
[patent_doc_number] => 06274918
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-14
[patent_title] => 'Integrated circuit diode, and method for fabricating same'
[patent_app_type] => 1
[patent_app_number] => 9/252171
[patent_app_country] => US
[patent_app_date] => 1999-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2359
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/274/06274918.pdf
[firstpage_image] =>[orig_patent_app_number] => 252171
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/252171 | Integrated circuit diode, and method for fabricating same | Feb 17, 1999 | Issued |
Array
(
[id] => 6897429
[patent_doc_number] => 20010045594
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-29
[patent_title] => 'ONE TIME PROGRAMMABLE READ ONLY MEMORY'
[patent_app_type] => new
[patent_app_number] => 09/239033
[patent_app_country] => US
[patent_app_date] => 1999-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2306
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0045/20010045594.pdf
[firstpage_image] =>[orig_patent_app_number] => 09239033
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/239033 | ONE TIME PROGRAMMABLE READ ONLY MEMORY | Jan 26, 1999 | Abandoned |
Array
(
[id] => 4388259
[patent_doc_number] => 06278172
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-21
[patent_title] => 'Semiconductor device having high-density capacitor elements and manufacturing method thereof'
[patent_app_type] => 1
[patent_app_number] => 9/228982
[patent_app_country] => US
[patent_app_date] => 1999-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 83
[patent_no_of_words] => 10441
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/278/06278172.pdf
[firstpage_image] =>[orig_patent_app_number] => 228982
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/228982 | Semiconductor device having high-density capacitor elements and manufacturing method thereof | Jan 11, 1999 | Issued |
Array
(
[id] => 4265605
[patent_doc_number] => 06259120
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-10
[patent_title] => 'Semiconductor device and method for fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 9/224955
[patent_app_country] => US
[patent_app_date] => 1999-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 35
[patent_no_of_words] => 7929
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 13
[patent_words_short_claim] => 18
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/259/06259120.pdf
[firstpage_image] =>[orig_patent_app_number] => 224955
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/224955 | Semiconductor device and method for fabricating the same | Jan 3, 1999 | Issued |
Array
(
[id] => 4309574
[patent_doc_number] => 06188109
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-13
[patent_title] => 'Semiconductor device having a sense electrode'
[patent_app_type] => 1
[patent_app_number] => 9/212263
[patent_app_country] => US
[patent_app_date] => 1998-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 52
[patent_figures_cnt] => 88
[patent_no_of_words] => 37066
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/188/06188109.pdf
[firstpage_image] =>[orig_patent_app_number] => 212263
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/212263 | Semiconductor device having a sense electrode | Dec 15, 1998 | Issued |
Array
(
[id] => 5885770
[patent_doc_number] => 20020011610
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-01-31
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING PAIRS OF BIT LINES ARRANGED ON BOTH SIDES OF MEMORY CELLS'
[patent_app_type] => new
[patent_app_number] => 09/210753
[patent_app_country] => US
[patent_app_date] => 1998-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2808
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0011/20020011610.pdf
[firstpage_image] =>[orig_patent_app_number] => 09210753
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/210753 | Semiconductor memory device having pairs of bit lines arranged on both sides of memory cells | Dec 14, 1998 | Issued |
Array
(
[id] => 1417062
[patent_doc_number] => 06528856
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-04
[patent_title] => 'High dielectric constant metal oxide gate dielectrics'
[patent_app_type] => B1
[patent_app_number] => 09/212773
[patent_app_country] => US
[patent_app_date] => 1998-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 4496
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 25
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/528/06528856.pdf
[firstpage_image] =>[orig_patent_app_number] => 09212773
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/212773 | High dielectric constant metal oxide gate dielectrics | Dec 14, 1998 | Issued |
Array
(
[id] => 4408105
[patent_doc_number] => 06309928
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-30
[patent_title] => 'Split-gate flash cell'
[patent_app_type] => 1
[patent_app_number] => 9/208913
[patent_app_country] => US
[patent_app_date] => 1998-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 5495
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 397
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/309/06309928.pdf
[firstpage_image] =>[orig_patent_app_number] => 208913
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/208913 | Split-gate flash cell | Dec 9, 1998 | Issued |
Array
(
[id] => 7645267
[patent_doc_number] => 06472705
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-29
[patent_title] => 'Molecular memory & logic'
[patent_app_type] => B1
[patent_app_number] => 09/195083
[patent_app_country] => US
[patent_app_date] => 1998-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 5991
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/472/06472705.pdf
[firstpage_image] =>[orig_patent_app_number] => 09195083
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/195083 | Molecular memory & logic | Nov 17, 1998 | Issued |
Array
(
[id] => 1395340
[patent_doc_number] => 06548843
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-04-15
[patent_title] => 'Ferroelectric storage read-write memory'
[patent_app_type] => B2
[patent_app_number] => 09/190131
[patent_app_country] => US
[patent_app_date] => 1998-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 17
[patent_no_of_words] => 8247
[patent_no_of_claims] => 91
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/548/06548843.pdf
[firstpage_image] =>[orig_patent_app_number] => 09190131
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/190131 | Ferroelectric storage read-write memory | Nov 11, 1998 | Issued |
Array
(
[id] => 3953798
[patent_doc_number] => 05977596
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-02
[patent_title] => 'Depletion controlled isolation stage'
[patent_app_type] => 1
[patent_app_number] => 9/182361
[patent_app_country] => US
[patent_app_date] => 1998-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 19
[patent_no_of_words] => 2663
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/977/05977596.pdf
[firstpage_image] =>[orig_patent_app_number] => 182361
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/182361 | Depletion controlled isolation stage | Oct 28, 1998 | Issued |
Array
(
[id] => 4360552
[patent_doc_number] => 06218700
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-17
[patent_title] => 'Remanent memory device'
[patent_app_type] => 1
[patent_app_number] => 9/181432
[patent_app_country] => US
[patent_app_date] => 1998-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 8
[patent_no_of_words] => 2058
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/218/06218700.pdf
[firstpage_image] =>[orig_patent_app_number] => 181432
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/181432 | Remanent memory device | Oct 27, 1998 | Issued |
Array
(
[id] => 4336793
[patent_doc_number] => 06313508
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-06
[patent_title] => 'Semiconductor device of high-voltage CMOS structure and method of fabricating same'
[patent_app_type] => 1
[patent_app_number] => 9/179851
[patent_app_country] => US
[patent_app_date] => 1998-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 19
[patent_no_of_words] => 10336
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/313/06313508.pdf
[firstpage_image] =>[orig_patent_app_number] => 179851
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/179851 | Semiconductor device of high-voltage CMOS structure and method of fabricating same | Oct 27, 1998 | Issued |