Search

Francisco Javier Aponte

Examiner (ID: 2180, Phone: (571)270-7164 , Office: P/2199 )

Most Active Art Unit
2199
Art Unit(s)
2198, 2151, 2199, 2158
Total Applications
690
Issued Applications
583
Pending Applications
65
Abandoned Applications
76

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9507025 [patent_doc_number] => 08745354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Computer system for resource allocation based on orders of proirity, and control method therefor' [patent_app_type] => utility [patent_app_number] => 13/131357 [patent_app_country] => US [patent_app_date] => 2011-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 10477 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13131357 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/131357
Computer system for resource allocation based on orders of proirity, and control method therefor Mar 1, 2011 Issued
Array ( [id] => 10551102 [patent_doc_number] => 09275734 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Memory having information refinement detection function by applying a logic operation in parallel for each memory address to the match/mismatch results of data items and memory addresses, information detection method using memory, and memory address comparison circuit for the memory' [patent_app_type] => utility [patent_app_number] => 13/387089 [patent_app_country] => US [patent_app_date] => 2011-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 21921 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13387089 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/387089
Memory having information refinement detection function by applying a logic operation in parallel for each memory address to the match/mismatch results of data items and memory addresses, information detection method using memory, and memory address comparison circuit for the memory Feb 16, 2011 Issued
Array ( [id] => 8849208 [patent_doc_number] => 08458408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Cache directed sequential prefetch' [patent_app_type] => utility [patent_app_number] => 13/023615 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3299 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13023615 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023615
Cache directed sequential prefetch Feb 8, 2011 Issued
Array ( [id] => 9314892 [patent_doc_number] => 08656127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Information processing terminal, method, program, and integrated circuit for controlling access to confidential information, and recording medium having the program recorded thereon' [patent_app_type] => utility [patent_app_number] => 13/319692 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11576 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13319692 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/319692
Information processing terminal, method, program, and integrated circuit for controlling access to confidential information, and recording medium having the program recorded thereon Feb 8, 2011 Issued
Array ( [id] => 7536495 [patent_doc_number] => 08050134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-01 [patent_title] => 'Multi-column addressing mode memory system including an integrated circuit memory device' [patent_app_type] => utility [patent_app_number] => 13/019785 [patent_app_country] => US [patent_app_date] => 2011-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8362 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/050/08050134.pdf [firstpage_image] =>[orig_patent_app_number] => 13019785 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/019785
Multi-column addressing mode memory system including an integrated circuit memory device Feb 1, 2011 Issued
Array ( [id] => 9829351 [patent_doc_number] => 08938589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-20 [patent_title] => 'Interface methods and apparatus for memory devices using arbitration' [patent_app_type] => utility [patent_app_number] => 13/386396 [patent_app_country] => US [patent_app_date] => 2011-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 13842 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13386396 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/386396
Interface methods and apparatus for memory devices using arbitration Jan 26, 2011 Issued
Array ( [id] => 7734530 [patent_doc_number] => 08103843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-24 [patent_title] => 'Snapshot system' [patent_app_type] => utility [patent_app_number] => 13/013183 [patent_app_country] => US [patent_app_date] => 2011-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 13149 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/103/08103843.pdf [firstpage_image] =>[orig_patent_app_number] => 13013183 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/013183
Snapshot system Jan 24, 2011 Issued
Array ( [id] => 9062794 [patent_doc_number] => 08549247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Storage system, management method of the storage system, and program' [patent_app_type] => utility [patent_app_number] => 13/054933 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 33 [patent_no_of_words] => 22101 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13054933 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/054933
Storage system, management method of the storage system, and program Dec 27, 2010 Issued
Array ( [id] => 8267294 [patent_doc_number] => 20120166723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'STORAGE SYSTEM AND MANAGEMENT METHOD OF CONTROL INFORMATION THEREIN' [patent_app_type] => utility [patent_app_number] => 13/054467 [patent_app_country] => US [patent_app_date] => 2010-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 13416 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13054467 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/054467
Storage system and management method of control information using a cache memory with multiple cache partitions Dec 26, 2010 Issued
Array ( [id] => 8267323 [patent_doc_number] => 20120166751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'STORAGE APPARATUS AND STORAGE MANAGEMENT METHOD' [patent_app_type] => utility [patent_app_number] => 13/054045 [patent_app_country] => US [patent_app_date] => 2010-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 12361 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13054045 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/054045
Storage apparatus and storage management method for storing entries in management tables Dec 21, 2010 Issued
Array ( [id] => 8267308 [patent_doc_number] => 20120166736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'STORAGE SYSTEM COMPRISING MULTIPLE STORAGE APPARATUSES WITH BOTH STORAGE VIRTUALIZATION FUNCTION AND CAPACITY VIRTUALIZATION FUNCTION' [patent_app_type] => utility [patent_app_number] => 13/054389 [patent_app_country] => US [patent_app_date] => 2010-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 15233 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13054389 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/054389
Storage system comprising multiple storage apparatuses with both storage virtualization function and capacity virtualization function Dec 21, 2010 Issued
Array ( [id] => 8254755 [patent_doc_number] => 20120159078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'Protecting Data During Different Connectivity States' [patent_app_type] => utility [patent_app_number] => 12/973902 [patent_app_country] => US [patent_app_date] => 2010-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7545 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20120159078.pdf [firstpage_image] =>[orig_patent_app_number] => 12973902 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/973902
Protecting data during different connectivity states Dec 20, 2010 Issued
Array ( [id] => 8254777 [patent_doc_number] => 20120159100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'STORAGE DEVICE MIGRATION AND REDIRECTION' [patent_app_type] => utility [patent_app_number] => 12/972541 [patent_app_country] => US [patent_app_date] => 2010-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5281 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20120159100.pdf [firstpage_image] =>[orig_patent_app_number] => 12972541 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/972541
Storage device migration and redirection Dec 19, 2010 Issued
Array ( [id] => 8849235 [patent_doc_number] => 08458435 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-04 [patent_title] => 'Sequential write thread detection' [patent_app_type] => utility [patent_app_number] => 12/973085 [patent_app_country] => US [patent_app_date] => 2010-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3337 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12973085 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/973085
Sequential write thread detection Dec 19, 2010 Issued
Array ( [id] => 8254740 [patent_doc_number] => 20120159067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'SYSTEM AND METHOD FOR HANDLING IO TO DRIVES IN A RAID SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/972427 [patent_app_country] => US [patent_app_date] => 2010-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6969 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20120159067.pdf [firstpage_image] =>[orig_patent_app_number] => 12972427 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/972427
System and method for handling IO to drives in a raid system based on strip size Dec 17, 2010 Issued
Array ( [id] => 8703788 [patent_doc_number] => 08397023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'System and method for handling IO to drives in a memory constrained environment' [patent_app_type] => utility [patent_app_number] => 12/972432 [patent_app_country] => US [patent_app_date] => 2010-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7128 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12972432 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/972432
System and method for handling IO to drives in a memory constrained environment Dec 17, 2010 Issued
Array ( [id] => 5948439 [patent_doc_number] => 20110107034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'CACHE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/917926 [patent_app_country] => US [patent_app_date] => 2010-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5162 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20110107034.pdf [firstpage_image] =>[orig_patent_app_number] => 12917926 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/917926
CACHE DEVICE Nov 1, 2010 Abandoned
Array ( [id] => 6189169 [patent_doc_number] => 20110125946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'Arbitrated Access To Memory Shared By A Processor And A Data Flow' [patent_app_type] => utility [patent_app_number] => 12/916668 [patent_app_country] => US [patent_app_date] => 2010-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6137 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20110125946.pdf [firstpage_image] =>[orig_patent_app_number] => 12916668 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/916668
Arbitrated access to memory shared by a processor and a data flow Oct 31, 2010 Issued
Array ( [id] => 9940662 [patent_doc_number] => 08990494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Home storage system and method with various controllers' [patent_app_type] => utility [patent_app_number] => 12/916873 [patent_app_country] => US [patent_app_date] => 2010-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3392 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 425 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12916873 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/916873
Home storage system and method with various controllers Oct 31, 2010 Issued
Array ( [id] => 7694963 [patent_doc_number] => 20110231627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'MEMORY MANAGING APPARATUS AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/917173 [patent_app_country] => US [patent_app_date] => 2010-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4802 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20110231627.pdf [firstpage_image] =>[orig_patent_app_number] => 12917173 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/917173
Memory managing apparatus and method using a pointer indicator bit to perform garbage collection Oct 31, 2010 Issued
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