
Frank E. Werner
Examiner (ID: 9971)
| Most Active Art Unit | 3107 |
| Art Unit(s) | 2899, 3107, 3106, 3617, 3104, 3652 |
| Total Applications | 1492 |
| Issued Applications | 1247 |
| Pending Applications | 54 |
| Abandoned Applications | 191 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12083274
[patent_doc_number] => 20170345862
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-30
[patent_title] => 'SEMICONDUCTOR PACKAGE WITH INTERPOSER'
[patent_app_type] => utility
[patent_app_number] => 15/166007
[patent_app_country] => US
[patent_app_date] => 2016-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2493
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15166007
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/166007 | SEMICONDUCTOR PACKAGE WITH INTERPOSER | May 25, 2016 | Abandoned |
Array
(
[id] => 11571729
[patent_doc_number] => 20170110373
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-20
[patent_title] => 'COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR AND METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 15/166076
[patent_app_country] => US
[patent_app_date] => 2016-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4441
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15166076
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/166076 | Complementary metal-oxide-semiconductor field-effect transistor and method thereof | May 25, 2016 | Issued |
Array
(
[id] => 12990706
[patent_doc_number] => 20170345983
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-30
[patent_title] => LIGHT-EMITTING DEVICE AND LIGHT-EMITTING APPARATUS COMPRISING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/165943
[patent_app_country] => US
[patent_app_date] => 2016-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8344
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15165943
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/165943 | LIGHT-EMITTING DEVICE AND LIGHT-EMITTING APPARATUS COMPRISING THE SAME | May 25, 2016 | Abandoned |
Array
(
[id] => 13894031
[patent_doc_number] => 10199572
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-05
[patent_title] => Integrated magnetic random access memory with logic device
[patent_app_type] => utility
[patent_app_number] => 15/164914
[patent_app_country] => US
[patent_app_date] => 2016-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 10012
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15164914
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/164914 | Integrated magnetic random access memory with logic device | May 25, 2016 | Issued |
Array
(
[id] => 15401275
[patent_doc_number] => 10541300
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-01-21
[patent_title] => Semiconductor device and method of making thereof
[patent_app_type] => utility
[patent_app_number] => 15/164928
[patent_app_country] => US
[patent_app_date] => 2016-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 6306
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15164928
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/164928 | Semiconductor device and method of making thereof | May 25, 2016 | Issued |
Array
(
[id] => 12005490
[patent_doc_number] => 20170309644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-26
[patent_title] => 'DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/166248
[patent_app_country] => US
[patent_app_date] => 2016-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 13450
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15166248
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/166248 | DISPLAY DEVICE | May 25, 2016 | Abandoned |
Array
(
[id] => 11315455
[patent_doc_number] => 20160351565
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-01
[patent_title] => 'INTEGRATED CIRCUIT (IC) DEVICES INCLUDING STRESS INDUCING LAYERS'
[patent_app_type] => utility
[patent_app_number] => 15/076952
[patent_app_country] => US
[patent_app_date] => 2016-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 55
[patent_figures_cnt] => 55
[patent_no_of_words] => 28188
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15076952
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/076952 | Integrated circuit (IC) devices including stress inducing layers | Mar 21, 2016 | Issued |
Array
(
[id] => 13808359
[patent_doc_number] => 10181448
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-15
[patent_title] => Semiconductor devices and semiconductor packages
[patent_app_type] => utility
[patent_app_number] => 15/076831
[patent_app_country] => US
[patent_app_date] => 2016-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 29
[patent_no_of_words] => 5871
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15076831
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/076831 | Semiconductor devices and semiconductor packages | Mar 21, 2016 | Issued |
Array
(
[id] => 13808359
[patent_doc_number] => 10181448
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-15
[patent_title] => Semiconductor devices and semiconductor packages
[patent_app_type] => utility
[patent_app_number] => 15/076831
[patent_app_country] => US
[patent_app_date] => 2016-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 29
[patent_no_of_words] => 5871
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15076831
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/076831 | Semiconductor devices and semiconductor packages | Mar 21, 2016 | Issued |
Array
(
[id] => 11000160
[patent_doc_number] => 20160197107
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-07
[patent_title] => 'THIN FILM TRANSISTOR SUBSTRATE HAVING METAL OXIDE SEMICONDUCTOR AND MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/073278
[patent_app_country] => US
[patent_app_date] => 2016-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7643
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15073278
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/073278 | Thin film transistor substrate having metal oxide semiconductor and manufacturing the same | Mar 16, 2016 | Issued |
Array
(
[id] => 11959413
[patent_doc_number] => 20170263565
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-14
[patent_title] => 'INTEGRATED CIRCUIT (IC) PACKAGE WITH A GROUNDED ELECTRICALLY CONDUCTIVE SHIELD LAYER AND ASSOCIATED METHODS'
[patent_app_type] => utility
[patent_app_number] => 15/068741
[patent_app_country] => US
[patent_app_date] => 2016-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3530
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15068741
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/068741 | INTEGRATED CIRCUIT (IC) PACKAGE WITH A GROUNDED ELECTRICALLY CONDUCTIVE SHIELD LAYER AND ASSOCIATED METHODS | Mar 13, 2016 | Abandoned |
Array
(
[id] => 11096570
[patent_doc_number] => 20160293539
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-06
[patent_title] => 'THREE-DIMENSIONAL SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/067833
[patent_app_country] => US
[patent_app_date] => 2016-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 10744
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15067833
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/067833 | Three-dimensional semiconductor device | Mar 10, 2016 | Issued |
Array
(
[id] => 11079591
[patent_doc_number] => 20160276555
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-22
[patent_title] => 'LIGHT EMITTING DEVICE MANUFACTURING METHOD AND LIGHT EMITTING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/068360
[patent_app_country] => US
[patent_app_date] => 2016-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6737
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15068360
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/068360 | LIGHT EMITTING DEVICE MANUFACTURING METHOD AND LIGHT EMITTING DEVICE | Mar 10, 2016 | Abandoned |
Array
(
[id] => 11087875
[patent_doc_number] => 20160284843
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-29
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/065708
[patent_app_country] => US
[patent_app_date] => 2016-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 9263
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15065708
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/065708 | Semiconductor device and method for manufacturing semiconductor device | Mar 8, 2016 | Issued |
Array
(
[id] => 13121673
[patent_doc_number] => 10079192
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-09-18
[patent_title] => Semiconductor chip package assembly with improved heat dissipation performance
[patent_app_type] => utility
[patent_app_number] => 15/064545
[patent_app_country] => US
[patent_app_date] => 2016-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 2965
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15064545
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/064545 | Semiconductor chip package assembly with improved heat dissipation performance | Mar 7, 2016 | Issued |
Array
(
[id] => 11959452
[patent_doc_number] => 20170263604
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-14
[patent_title] => 'ENLARGING SPACER THICKNESS BY FORMING A DIELECTRIC LAYER OVER A RECESSED INTERLAYER DIELECTRIC'
[patent_app_type] => utility
[patent_app_number] => 15/063907
[patent_app_country] => US
[patent_app_date] => 2016-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6087
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15063907
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/063907 | Enlarging spacer thickness by forming a dielectric layer over a recessed interlayer dielectric | Mar 7, 2016 | Issued |
Array
(
[id] => 15169959
[patent_doc_number] => 10490483
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-26
[patent_title] => Low capacitance through substrate via structures
[patent_app_type] => utility
[patent_app_number] => 15/062675
[patent_app_country] => US
[patent_app_date] => 2016-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 20
[patent_no_of_words] => 7364
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 404
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15062675
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/062675 | Low capacitance through substrate via structures | Mar 6, 2016 | Issued |
Array
(
[id] => 13257481
[patent_doc_number] => 10141438
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-11-27
[patent_title] => Semiconductor structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 15/062972
[patent_app_country] => US
[patent_app_date] => 2016-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 5220
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15062972
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/062972 | Semiconductor structure and manufacturing method thereof | Mar 6, 2016 | Issued |
Array
(
[id] => 13243321
[patent_doc_number] => 10134872
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-11-20
[patent_title] => Semiconductor device and a method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 15/063346
[patent_app_country] => US
[patent_app_date] => 2016-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 3565
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15063346
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/063346 | Semiconductor device and a method for fabricating the same | Mar 6, 2016 | Issued |
Array
(
[id] => 11424955
[patent_doc_number] => 20170033101
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-02-02
[patent_title] => 'INTEGRATED CIRCUIT AND STANDARD CELL LIBRARY'
[patent_app_type] => utility
[patent_app_number] => 15/060829
[patent_app_country] => US
[patent_app_date] => 2016-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 9489
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060829
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/060829 | INTEGRATED CIRCUIT AND STANDARD CELL LIBRARY | Mar 3, 2016 | Abandoned |