
Frank J. Asta
Examiner (ID: 4289)
| Most Active Art Unit | 2312 |
| Art Unit(s) | 2318, 2756, 2752, 2312 |
| Total Applications | 250 |
| Issued Applications | 208 |
| Pending Applications | 4 |
| Abandoned Applications | 38 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7625094
[patent_doc_number] => 06724076
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-20
[patent_title] => 'Package for a semiconductor chip'
[patent_app_type] => B1
[patent_app_number] => 10/111294
[patent_app_country] => US
[patent_app_date] => 2003-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1964
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/724/06724076.pdf
[firstpage_image] =>[orig_patent_app_number] => 10111294
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/111294 | Package for a semiconductor chip | Jun 25, 2003 | Issued |
Array
(
[id] => 1132655
[patent_doc_number] => 06787928
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-09-07
[patent_title] => 'Integrated circuit device having pads structure formed thereon and method for forming the same'
[patent_app_type] => B1
[patent_app_number] => 10/425973
[patent_app_country] => US
[patent_app_date] => 2003-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2264
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/787/06787928.pdf
[firstpage_image] =>[orig_patent_app_number] => 10425973
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/425973 | Integrated circuit device having pads structure formed thereon and method for forming the same | Apr 29, 2003 | Issued |
Array
(
[id] => 6872786
[patent_doc_number] => 20030193083
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-16
[patent_title] => 'Substrate for light emitting diodes'
[patent_app_type] => new
[patent_app_number] => 10/411134
[patent_app_country] => US
[patent_app_date] => 2003-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 1740
[patent_no_of_claims] => 5
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[patent_words_short_claim] => 40
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0193/20030193083.pdf
[firstpage_image] =>[orig_patent_app_number] => 10411134
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/411134 | Substrate for light emitting diodes | Apr 10, 2003 | Issued |
Array
(
[id] => 1120943
[patent_doc_number] => 06798069
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-09-28
[patent_title] => 'Integrated circuit having adaptable core and input/output regions with multi-layer pad trace conductors'
[patent_app_type] => B1
[patent_app_number] => 10/402054
[patent_app_country] => US
[patent_app_date] => 2003-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 4121
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/798/06798069.pdf
[firstpage_image] =>[orig_patent_app_number] => 10402054
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/402054 | Integrated circuit having adaptable core and input/output regions with multi-layer pad trace conductors | Mar 27, 2003 | Issued |
Array
(
[id] => 7421357
[patent_doc_number] => 20040000728
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-01
[patent_title] => 'Resin-sealed semiconductor device, and die bonding material and sealing material for use therein'
[patent_app_type] => new
[patent_app_number] => 10/381034
[patent_app_country] => US
[patent_app_date] => 2003-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 13477
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 175
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0000/20040000728.pdf
[firstpage_image] =>[orig_patent_app_number] => 10381034
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/381034 | Resin-sealed semiconductor device, and die bonding material and sealing material for use therein | Mar 20, 2003 | Issued |
Array
(
[id] => 6863732
[patent_doc_number] => 20030189258
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-09
[patent_title] => 'Semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/392934
[patent_app_country] => US
[patent_app_date] => 2003-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4185
[patent_no_of_claims] => 17
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0189/20030189258.pdf
[firstpage_image] =>[orig_patent_app_number] => 10392934
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/392934 | Multi-chip package semiconductor device having plural level interconnections | Mar 20, 2003 | Issued |
Array
(
[id] => 1170019
[patent_doc_number] => 06756687
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-06-29
[patent_title] => 'Interfacial strengthening for electroless nickel immersion gold substrates'
[patent_app_type] => B1
[patent_app_number] => 10/382784
[patent_app_country] => US
[patent_app_date] => 2003-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 3252
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/756/06756687.pdf
[firstpage_image] =>[orig_patent_app_number] => 10382784
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/382784 | Interfacial strengthening for electroless nickel immersion gold substrates | Mar 4, 2003 | Issued |
Array
(
[id] => 6704407
[patent_doc_number] => 20030151141
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-14
[patent_title] => 'External connection terminal and semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/374965
[patent_app_country] => US
[patent_app_date] => 2003-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 40
[patent_no_of_words] => 13125
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0151/20030151141.pdf
[firstpage_image] =>[orig_patent_app_number] => 10374965
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/374965 | External connection terminal and semiconductor device | Feb 27, 2003 | Issued |
Array
(
[id] => 6785822
[patent_doc_number] => 20030137061
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-24
[patent_title] => 'Encapsulation of organic polymer electronic devices'
[patent_app_type] => new
[patent_app_number] => 10/373817
[patent_app_country] => US
[patent_app_date] => 2003-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4306
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0137/20030137061.pdf
[firstpage_image] =>[orig_patent_app_number] => 10373817
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/373817 | Encapsulation of organic polymer electronic devices | Feb 25, 2003 | Abandoned |
Array
(
[id] => 1149764
[patent_doc_number] => 06774403
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-08-10
[patent_title] => 'Multi-colored LED lighted sign'
[patent_app_type] => B1
[patent_app_number] => 10/361183
[patent_app_country] => US
[patent_app_date] => 2003-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 961
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 243
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/774/06774403.pdf
[firstpage_image] =>[orig_patent_app_number] => 10361183
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/361183 | Multi-colored LED lighted sign | Feb 9, 2003 | Issued |
Array
(
[id] => 1125183
[patent_doc_number] => 06794691
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-21
[patent_title] => 'Use of irregularly shaped conductive filler features to improve planarization of the conductive layer while reducing parasitic capacitance introduced by the filler features'
[patent_app_type] => B2
[patent_app_number] => 10/348093
[patent_app_country] => US
[patent_app_date] => 2003-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2649
[patent_no_of_claims] => 53
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[patent_words_short_claim] => 182
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/794/06794691.pdf
[firstpage_image] =>[orig_patent_app_number] => 10348093
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/348093 | Use of irregularly shaped conductive filler features to improve planarization of the conductive layer while reducing parasitic capacitance introduced by the filler features | Jan 20, 2003 | Issued |
Array
(
[id] => 1132232
[patent_doc_number] => 06787815
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-07
[patent_title] => 'High-isolation semiconductor device'
[patent_app_type] => B2
[patent_app_number] => 10/341698
[patent_app_country] => US
[patent_app_date] => 2003-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/787/06787815.pdf
[firstpage_image] =>[orig_patent_app_number] => 10341698
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/341698 | High-isolation semiconductor device | Jan 13, 2003 | Issued |
Array
(
[id] => 1116928
[patent_doc_number] => 06800910
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-10-05
[patent_title] => 'FinFET device incorporating strained silicon in the channel region'
[patent_app_type] => B2
[patent_app_number] => 10/335474
[patent_app_country] => US
[patent_app_date] => 2002-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 3699
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/800/06800910.pdf
[firstpage_image] =>[orig_patent_app_number] => 10335474
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/335474 | FinFET device incorporating strained silicon in the channel region | Dec 30, 2002 | Issued |
Array
(
[id] => 7295958
[patent_doc_number] => 20040124507
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-01
[patent_title] => 'Contact structure and production method thereof'
[patent_app_type] => new
[patent_app_number] => 10/331564
[patent_app_country] => US
[patent_app_date] => 2002-12-30
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[pdf_file] => publications/A1/0124/20040124507.pdf
[firstpage_image] =>[orig_patent_app_number] => 10331564
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/331564 | Contact structure and production method thereof | Dec 29, 2002 | Abandoned |
Array
(
[id] => 1116873
[patent_doc_number] => 06800884
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-10-05
[patent_title] => 'Inter-tile buffer system for a field programmable gate array'
[patent_app_type] => B1
[patent_app_number] => 10/334393
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[pdf_file] => patents/06/800/06800884.pdf
[firstpage_image] =>[orig_patent_app_number] => 10334393
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/334393 | Inter-tile buffer system for a field programmable gate array | Dec 29, 2002 | Issued |
Array
(
[id] => 6655842
[patent_doc_number] => 20030132467
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-17
[patent_title] => 'Image sensor having photodiode on substrate'
[patent_app_type] => new
[patent_app_number] => 10/330273
[patent_app_country] => US
[patent_app_date] => 2002-12-30
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[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0132/20030132467.pdf
[firstpage_image] =>[orig_patent_app_number] => 10330273
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/330273 | Image sensor having photodiode on substrate | Dec 29, 2002 | Issued |
Array
(
[id] => 1318853
[patent_doc_number] => 06608333
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-19
[patent_title] => 'Organic light emitting diode device'
[patent_app_type] => B1
[patent_app_number] => 10/248113
[patent_app_country] => US
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[pdf_file] => patents/06/608/06608333.pdf
[firstpage_image] =>[orig_patent_app_number] => 10248113
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/248113 | Organic light emitting diode device | Dec 18, 2002 | Issued |
Array
(
[id] => 1218104
[patent_doc_number] => 06707143
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[patent_kind] => B2
[patent_issue_date] => 2004-03-16
[patent_title] => 'Stacked semiconductor chips attached to a wiring board'
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[firstpage_image] =>[orig_patent_app_number] => 10320379
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/320379 | Stacked semiconductor chips attached to a wiring board | Dec 16, 2002 | Issued |
Array
(
[id] => 6858964
[patent_doc_number] => 20030089972
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[patent_title] => 'Semiconductor device'
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[firstpage_image] =>[orig_patent_app_number] => 10320405
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/320405 | Semiconductor device | Dec 16, 2002 | Issued |
Array
(
[id] => 1144891
[patent_doc_number] => 06777796
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[patent_title] => 'Stacked semiconductor chips on a wiring board'
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/777/06777796.pdf
[firstpage_image] =>[orig_patent_app_number] => 10320362
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/320362 | Stacked semiconductor chips on a wiring board | Dec 16, 2002 | Issued |