Frank J. Asta

Array ( [id] => 3621297 [patent_doc_number] => 05590305 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'Programming circuits and techniques for programming logic' [patent_app_type] => 1 [patent_app_number] => 8/572806 [patent_app_country] => US [patent_app_date] => 1995-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6363 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/590/05590305.pdf [firstpage_image] =>[orig_patent_app_number] => 572806 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3730579 [patent_doc_number] => 05617555 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-01 [patent_title] => 'Burst random access memory employing sequenced banks of local tri-state drivers' [patent_app_type] => 1 [patent_app_number] => 8/565383 [patent_app_country] => US [patent_app_date] => 1995-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4845 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/617/05617555.pdf [firstpage_image] =>[orig_patent_app_number] => 565383 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3823411 [patent_doc_number] => 05710800 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Data receiving device' [patent_app_type] => 1 [patent_app_number] => 8/558325 [patent_app_country] => US [patent_app_date] => 1995-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 39 [patent_no_of_words] => 8162 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710800.pdf [firstpage_image] =>[orig_patent_app_number] => 558325 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3661201 [patent_doc_number] => 05630172 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Data transfer control apparatus wherein an externally set value is compared to a transfer count with a comparison of the count values causing a transfer of bus use right' [patent_app_type] => 1 [patent_app_number] => 8/557987 [patent_app_country] => US [patent_app_date] => 1995-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4001 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 312 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/630/05630172.pdf [firstpage_image] =>[orig_patent_app_number] => 557987 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3719366 [patent_doc_number] => 05655153 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'Buffer system' [patent_app_type] => 1 [patent_app_number] => 8/554739 [patent_app_country] => US [patent_app_date] => 1995-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 5811 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/655/05655153.pdf [firstpage_image] =>[orig_patent_app_number] => 554739 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3635165 [patent_doc_number] => 05689730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Network interface apparatus adaptable to multifunction peripheral apparatus' [patent_app_type] => 1 [patent_app_number] => 8/554573 [patent_app_country] => US [patent_app_date] => 1995-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 10844 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689730.pdf [firstpage_image] =>[orig_patent_app_number] => 554573 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3636627 [patent_doc_number] => 05594923 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Direct memory access controller comprising a multi-word data register for high speed continuous data transfer' [patent_app_type] => 1 [patent_app_number] => 8/551700 [patent_app_country] => US [patent_app_date] => 1995-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 9418 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594923.pdf [firstpage_image] =>[orig_patent_app_number] => 551700 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3674495 [patent_doc_number] => 05657470 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Personal computer hard disk protection system' [patent_app_type] => 1 [patent_app_number] => 8/547211 [patent_app_country] => US [patent_app_date] => 1995-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5039 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/657/05657470.pdf [firstpage_image] =>[orig_patent_app_number] => 547211 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3642191 [patent_doc_number] => 05687346 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'PC card and PC card system with dual port ram and switchable rewritable ROM' [patent_app_type] => 1 [patent_app_number] => 8/535639 [patent_app_country] => US [patent_app_date] => 1995-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4560 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687346.pdf [firstpage_image] =>[orig_patent_app_number] => 535639 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3646454 [patent_doc_number] => 05632027 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-20 [patent_title] => 'Method and system for mass storage device configuration management' [patent_app_type] => 1 [patent_app_number] => 8/528287 [patent_app_country] => US [patent_app_date] => 1995-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3548 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/632/05632027.pdf [firstpage_image] =>[orig_patent_app_number] => 528287 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3675478 [patent_doc_number] => 05625790 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-29 [patent_title] => 'Method and apparatus for reducing the access time of a memory device by decoding a row address during a precharge period of the memory device' [patent_app_type] => 1 [patent_app_number] => 8/528021 [patent_app_country] => US [patent_app_date] => 1995-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4595 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/625/05625790.pdf [firstpage_image] =>[orig_patent_app_number] => 528021 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3871074 [patent_doc_number] => 05706467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'Sequential cache management system utilizing the establishment of a microcache and managing the contents of such according to a threshold comparison' [patent_app_type] => 1 [patent_app_number] => 8/523305 [patent_app_country] => US [patent_app_date] => 1995-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 12919 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/706/05706467.pdf [firstpage_image] =>[orig_patent_app_number] => 523305 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3530837 [patent_doc_number] => 05577255 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-19 [patent_title] => 'Method for transmitting information present at a plurality of data interfaces of a processor-controlled equipment to the processing device thereof' [patent_app_type] => 1 [patent_app_number] => 8/523590 [patent_app_country] => US [patent_app_date] => 1995-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3485 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/577/05577255.pdf [firstpage_image] =>[orig_patent_app_number] => 523590 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3751080 [patent_doc_number] => 05699546 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-16 [patent_title] => 'Memory management control device and method for performing rewrite on internal non-volatile memory according to an operation state determination' [patent_app_type] => 1 [patent_app_number] => 8/522915 [patent_app_country] => US [patent_app_date] => 1995-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 8379 [patent_no_of_claims] => 74 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/699/05699546.pdf [firstpage_image] =>[orig_patent_app_number] => 522915 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3642272 [patent_doc_number] => 05687352 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Memory device controlled by control signals in the form of gray code' [patent_app_type] => 1 [patent_app_number] => 8/519169 [patent_app_country] => US [patent_app_date] => 1995-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7176 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687352.pdf [firstpage_image] =>[orig_patent_app_number] => 519169 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3616605 [patent_doc_number] => 05579505 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Memory access system and method for granting or preventing atomic or nonatomic memory access requests to shared memory regions' [patent_app_type] => 1 [patent_app_number] => 8/517549 [patent_app_country] => US [patent_app_date] => 1995-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 5820 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/579/05579505.pdf [firstpage_image] =>[orig_patent_app_number] => 517549 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3674468 [patent_doc_number] => 05657468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Method and apparatus for improving performance in a reduntant array of independent disks' [patent_app_type] => 1 [patent_app_number] => 8/516293 [patent_app_country] => US [patent_app_date] => 1995-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 13288 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/657/05657468.pdf [firstpage_image] =>[orig_patent_app_number] => 516293 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3701250 [patent_doc_number] => 05692156 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-25 [patent_title] => 'Computer program product for overflow queue processing' [patent_app_type] => 1 [patent_app_number] => 8/508911 [patent_app_country] => US [patent_app_date] => 1995-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4533 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/692/05692156.pdf [firstpage_image] =>[orig_patent_app_number] => 508911 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3805837 [patent_doc_number] => 05737742 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Memory system using flash memory and method of controlling the memory system' [patent_app_type] => 1 [patent_app_number] => 8/495165 [patent_app_country] => US [patent_app_date] => 1995-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 28 [patent_no_of_words] => 10029 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737742.pdf [firstpage_image] =>[orig_patent_app_number] => 495165 [rel_patent_id] =>[rel_patent_doc_number] =>)