
Frank J. Vineis
Examiner (ID: 2880, Phone: (571)270-1547 , Office: P/1786 )
| Most Active Art Unit | 1786 |
| Art Unit(s) | 1781, 1786 |
| Total Applications | 265 |
| Issued Applications | 95 |
| Pending Applications | 23 |
| Abandoned Applications | 150 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4320183
[patent_doc_number] => 06242817
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-05
[patent_title] => 'Fabricated wafer for integration in a wafer structure'
[patent_app_type] => 1
[patent_app_number] => 9/221757
[patent_app_country] => US
[patent_app_date] => 1998-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 15
[patent_no_of_words] => 3968
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/242/06242817.pdf
[firstpage_image] =>[orig_patent_app_number] => 221757
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/221757 | Fabricated wafer for integration in a wafer structure | Dec 27, 1998 | Issued |
Array
(
[id] => 4376811
[patent_doc_number] => 06303392
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-16
[patent_title] => 'Etching mask, method of making same, etching method, magnetic head device and method of manufacturing same'
[patent_app_type] => 1
[patent_app_number] => 9/219707
[patent_app_country] => US
[patent_app_date] => 1998-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 45
[patent_no_of_words] => 8232
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 9
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/303/06303392.pdf
[firstpage_image] =>[orig_patent_app_number] => 219707
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/219707 | Etching mask, method of making same, etching method, magnetic head device and method of manufacturing same | Dec 22, 1998 | Issued |
Array
(
[id] => 4368506
[patent_doc_number] => 06287903
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-09-11
[patent_title] => 'Structure and method for a large-permittivity dielectric using a germanium layer'
[patent_app_type] => 1
[patent_app_number] => 9/217337
[patent_app_country] => US
[patent_app_date] => 1998-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 13
[patent_no_of_words] => 5518
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 76
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/287/06287903.pdf
[firstpage_image] =>[orig_patent_app_number] => 217337
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/217337 | Structure and method for a large-permittivity dielectric using a germanium layer | Dec 20, 1998 | Issued |
Array
(
[id] => 4309946
[patent_doc_number] => 06252262
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-26
[patent_title] => 'Metal passivating layer for III-V semiconductors, and improved gate contact for III-V-based metal-insulator-semiconductor (MIS) devices'
[patent_app_type] => 1
[patent_app_number] => 9/210596
[patent_app_country] => US
[patent_app_date] => 1998-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2324
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 23
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/252/06252262.pdf
[firstpage_image] =>[orig_patent_app_number] => 210596
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/210596 | Metal passivating layer for III-V semiconductors, and improved gate contact for III-V-based metal-insulator-semiconductor (MIS) devices | Dec 14, 1998 | Issued |
Array
(
[id] => 4113551
[patent_doc_number] => 06046061
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-04
[patent_title] => 'Method of inspecting wafer water mark'
[patent_app_type] => 1
[patent_app_number] => 9/206177
[patent_app_country] => US
[patent_app_date] => 1998-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1781
[patent_no_of_claims] => 18
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[pdf_file] => patents/06/046/06046061.pdf
[firstpage_image] =>[orig_patent_app_number] => 206177
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/206177 | Method of inspecting wafer water mark | Dec 3, 1998 | Issued |
Array
(
[id] => 4214051
[patent_doc_number] => 06110755
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-29
[patent_title] => 'Method for manufacturing semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/194733
[patent_app_country] => US
[patent_app_date] => 1998-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 11
[patent_no_of_words] => 3121
[patent_no_of_claims] => 6
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[patent_words_short_claim] => 186
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[pdf_file] => patents/06/110/06110755.pdf
[firstpage_image] =>[orig_patent_app_number] => 194733
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/194733 | Method for manufacturing semiconductor device | Dec 1, 1998 | Issued |
Array
(
[id] => 4365830
[patent_doc_number] => 06255672
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/199780
[patent_app_country] => US
[patent_app_date] => 1998-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 3026
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 144
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/255/06255672.pdf
[firstpage_image] =>[orig_patent_app_number] => 199780
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/199780 | Semiconductor device | Nov 24, 1998 | Issued |
Array
(
[id] => 4130845
[patent_doc_number] => 06121070
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-19
[patent_title] => 'Flip chip down-bond: method and apparatus'
[patent_app_type] => 1
[patent_app_number] => 9/198737
[patent_app_country] => US
[patent_app_date] => 1998-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 4852
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/121/06121070.pdf
[firstpage_image] =>[orig_patent_app_number] => 198737
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/198737 | Flip chip down-bond: method and apparatus | Nov 23, 1998 | Issued |
Array
(
[id] => 4232541
[patent_doc_number] => 06117710
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-12
[patent_title] => 'Plastic package with exposed die and method of making same'
[patent_app_type] => 1
[patent_app_number] => 9/195350
[patent_app_country] => US
[patent_app_date] => 1998-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2189
[patent_no_of_claims] => 6
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[pdf_file] => patents/06/117/06117710.pdf
[firstpage_image] =>[orig_patent_app_number] => 195350
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/195350 | Plastic package with exposed die and method of making same | Nov 17, 1998 | Issued |
Array
(
[id] => 4257014
[patent_doc_number] => 06207974
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-27
[patent_title] => 'Process for manufacture of a p-channel MOS gated device with base implant through the contact window'
[patent_app_type] => 1
[patent_app_number] => 9/193507
[patent_app_country] => US
[patent_app_date] => 1998-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 2506
[patent_no_of_claims] => 6
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[pdf_file] => patents/06/207/06207974.pdf
[firstpage_image] =>[orig_patent_app_number] => 193507
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/193507 | Process for manufacture of a p-channel MOS gated device with base implant through the contact window | Nov 16, 1998 | Issued |
Array
(
[id] => 4125276
[patent_doc_number] => 06127254
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-03
[patent_title] => 'Method and device for precise alignment of semiconductor chips on a substrate'
[patent_app_type] => 1
[patent_app_number] => 9/189427
[patent_app_country] => US
[patent_app_date] => 1998-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/06/127/06127254.pdf
[firstpage_image] =>[orig_patent_app_number] => 189427
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/189427 | Method and device for precise alignment of semiconductor chips on a substrate | Nov 9, 1998 | Issued |
Array
(
[id] => 4357622
[patent_doc_number] => 06255127
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Analyzing method and apparatus for minute foreign substances, and manufacturing methods for manufacturing semiconductor device and liquid crystal display device using the same'
[patent_app_type] => 1
[patent_app_number] => 9/187938
[patent_app_country] => US
[patent_app_date] => 1998-11-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/255/06255127.pdf
[firstpage_image] =>[orig_patent_app_number] => 187938
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/187938 | Analyzing method and apparatus for minute foreign substances, and manufacturing methods for manufacturing semiconductor device and liquid crystal display device using the same | Nov 5, 1998 | Issued |
Array
(
[id] => 4177299
[patent_doc_number] => 06037188
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-14
[patent_title] => 'Method of manufacturing photosensitive semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/184837
[patent_app_country] => US
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[pdf_file] => patents/06/037/06037188.pdf
[firstpage_image] =>[orig_patent_app_number] => 184837
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/184837 | Method of manufacturing photosensitive semiconductor device | Nov 2, 1998 | Issued |
Array
(
[id] => 4290155
[patent_doc_number] => 06235623
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-22
[patent_title] => 'Methods of forming integrated circuit contact holes using blocking layer patterns'
[patent_app_type] => 1
[patent_app_number] => 9/184227
[patent_app_country] => US
[patent_app_date] => 1998-11-02
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[pdf_file] => patents/06/235/06235623.pdf
[firstpage_image] =>[orig_patent_app_number] => 184227
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Array
(
[id] => 4129781
[patent_doc_number] => 06033936
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-07
[patent_title] => 'Method of mounting an LSI package'
[patent_app_type] => 1
[patent_app_number] => 9/179430
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 179430
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/179430 | Method of mounting an LSI package | Oct 26, 1998 | Issued |
Array
(
[id] => 4151765
[patent_doc_number] => 06124152
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-26
[patent_title] => 'Method for fabricating cob type semiconductor package'
[patent_app_type] => 1
[patent_app_number] => 9/178617
[patent_app_country] => US
[patent_app_date] => 1998-10-26
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[pdf_file] => patents/06/124/06124152.pdf
[firstpage_image] =>[orig_patent_app_number] => 178617
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/178617 | Method for fabricating cob type semiconductor package | Oct 25, 1998 | Issued |
Array
(
[id] => 4116387
[patent_doc_number] => 06071757
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-06
[patent_title] => 'Condensed memory matrix'
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[pdf_file] => patents/06/071/06071757.pdf
[firstpage_image] =>[orig_patent_app_number] => 175490
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/175490 | Condensed memory matrix | Oct 19, 1998 | Issued |
Array
(
[id] => 4408352
[patent_doc_number] => 06228685
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-08
[patent_title] => 'Framed sheet processing'
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[pdf_file] => patents/06/228/06228685.pdf
[firstpage_image] =>[orig_patent_app_number] => 174074
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/174074 | Framed sheet processing | Oct 15, 1998 | Issued |
Array
(
[id] => 4405736
[patent_doc_number] => 06232211
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[patent_issue_date] => 2001-05-15
[patent_title] => 'Two-step projecting bump for semiconductor chip and method for forming the same'
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[pdf_file] => patents/06/232/06232211.pdf
[firstpage_image] =>[orig_patent_app_number] => 171256
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/171256 | Two-step projecting bump for semiconductor chip and method for forming the same | Oct 15, 1998 | Issued |
Array
(
[id] => 4214872
[patent_doc_number] => 06087195
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-11
[patent_title] => 'Method and system for manufacturing lamp tiles'
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[patent_app_country] => US
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/087/06087195.pdf
[firstpage_image] =>[orig_patent_app_number] => 172760
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/172760 | Method and system for manufacturing lamp tiles | Oct 14, 1998 | Issued |