
Frank J. Vineis
Examiner (ID: 2880, Phone: (571)270-1547 , Office: P/1786 )
| Most Active Art Unit | 1786 |
| Art Unit(s) | 1781, 1786 |
| Total Applications | 265 |
| Issued Applications | 95 |
| Pending Applications | 23 |
| Abandoned Applications | 150 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3896253
[patent_doc_number] => 05897339
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-27
[patent_title] => 'Lead-on-chip semiconductor device package having an adhesive layer formed from liquid adhesive and method for manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/915668
[patent_app_country] => US
[patent_app_date] => 1997-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 3946
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/897/05897339.pdf
[firstpage_image] =>[orig_patent_app_number] => 915668
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/915668 | Lead-on-chip semiconductor device package having an adhesive layer formed from liquid adhesive and method for manufacturing the same | Aug 20, 1997 | Issued |
Array
(
[id] => 3945024
[patent_doc_number] => 05953589
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Ball grid array semiconductor package with solder balls fused on printed circuit board and method for fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 8/915077
[patent_app_country] => US
[patent_app_date] => 1997-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 27
[patent_no_of_words] => 7292
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/953/05953589.pdf
[firstpage_image] =>[orig_patent_app_number] => 915077
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/915077 | Ball grid array semiconductor package with solder balls fused on printed circuit board and method for fabricating the same | Aug 19, 1997 | Issued |
Array
(
[id] => 4056762
[patent_doc_number] => 05863813
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-26
[patent_title] => 'Method of processing semiconductive material wafers and method of forming flip chips and semiconductor chips'
[patent_app_type] => 1
[patent_app_number] => 8/917004
[patent_app_country] => US
[patent_app_date] => 1997-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 2581
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/863/05863813.pdf
[firstpage_image] =>[orig_patent_app_number] => 917004
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/917004 | Method of processing semiconductive material wafers and method of forming flip chips and semiconductor chips | Aug 19, 1997 | Issued |
Array
(
[id] => 4003846
[patent_doc_number] => 05960258
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-28
[patent_title] => 'Underfill coating for LOC package'
[patent_app_type] => 1
[patent_app_number] => 8/915422
[patent_app_country] => US
[patent_app_date] => 1997-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 21
[patent_no_of_words] => 6094
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 326
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/960/05960258.pdf
[firstpage_image] =>[orig_patent_app_number] => 915422
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/915422 | Underfill coating for LOC package | Aug 19, 1997 | Issued |
Array
(
[id] => 3896267
[patent_doc_number] => 05897340
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-27
[patent_title] => 'Hybrid frame with lead-lock tape'
[patent_app_type] => 1
[patent_app_number] => 8/914718
[patent_app_country] => US
[patent_app_date] => 1997-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 3285
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/897/05897340.pdf
[firstpage_image] =>[orig_patent_app_number] => 914718
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/914718 | Hybrid frame with lead-lock tape | Aug 18, 1997 | Issued |
Array
(
[id] => 3935328
[patent_doc_number] => 05972780
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'Thin film forming apparatus and method'
[patent_app_type] => 1
[patent_app_number] => 8/911845
[patent_app_country] => US
[patent_app_date] => 1997-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 29
[patent_no_of_words] => 9736
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/972/05972780.pdf
[firstpage_image] =>[orig_patent_app_number] => 911845
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/911845 | Thin film forming apparatus and method | Aug 14, 1997 | Issued |
Array
(
[id] => 3936732
[patent_doc_number] => 05915166
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-22
[patent_title] => 'Tape under frame for conventional-type IC package assembly'
[patent_app_type] => 1
[patent_app_number] => 8/910611
[patent_app_country] => US
[patent_app_date] => 1997-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3304
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/915/05915166.pdf
[firstpage_image] =>[orig_patent_app_number] => 910611
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/910611 | Tape under frame for conventional-type IC package assembly | Aug 12, 1997 | Issued |
| 08/910348 | SEMICONDUCTOR DEVICE | Aug 12, 1997 | Abandoned |
Array
(
[id] => 3996786
[patent_doc_number] => 05911112
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-08
[patent_title] => 'Method for forming electrical connections between a semiconductor die and a semiconductor package'
[patent_app_type] => 1
[patent_app_number] => 8/904530
[patent_app_country] => US
[patent_app_date] => 1997-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 19
[patent_no_of_words] => 6512
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/911/05911112.pdf
[firstpage_image] =>[orig_patent_app_number] => 904530
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/904530 | Method for forming electrical connections between a semiconductor die and a semiconductor package | Jul 31, 1997 | Issued |
Array
(
[id] => 4237742
[patent_doc_number] => 06080604
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-27
[patent_title] => 'Semiconductor device having tab-leads and a fabrication method thereof'
[patent_app_type] => 1
[patent_app_number] => 8/901280
[patent_app_country] => US
[patent_app_date] => 1997-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 2366
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/080/06080604.pdf
[firstpage_image] =>[orig_patent_app_number] => 901280
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/901280 | Semiconductor device having tab-leads and a fabrication method thereof | Jul 28, 1997 | Issued |
Array
(
[id] => 4138938
[patent_doc_number] => 06060339
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-09
[patent_title] => 'Method and apparatus providing redundancy for fabricating highly reliable memory modules'
[patent_app_type] => 1
[patent_app_number] => 8/902470
[patent_app_country] => US
[patent_app_date] => 1997-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 4539
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/060/06060339.pdf
[firstpage_image] =>[orig_patent_app_number] => 902470
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/902470 | Method and apparatus providing redundancy for fabricating highly reliable memory modules | Jul 28, 1997 | Issued |
Array
(
[id] => 3964497
[patent_doc_number] => 05885848
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-23
[patent_title] => 'Ball grid array with inexpensive threaded secure locking mechanism to allow removal of a threaded heat sink therefrom'
[patent_app_type] => 1
[patent_app_number] => 8/901489
[patent_app_country] => US
[patent_app_date] => 1997-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 1897
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/885/05885848.pdf
[firstpage_image] =>[orig_patent_app_number] => 901489
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/901489 | Ball grid array with inexpensive threaded secure locking mechanism to allow removal of a threaded heat sink therefrom | Jul 27, 1997 | Issued |
Array
(
[id] => 3999281
[patent_doc_number] => 05950072
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-07
[patent_title] => 'Low-profile removable ball-grid-array integrated circuit package'
[patent_app_type] => 1
[patent_app_number] => 8/900674
[patent_app_country] => US
[patent_app_date] => 1997-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 8
[patent_no_of_words] => 2523
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/950/05950072.pdf
[firstpage_image] =>[orig_patent_app_number] => 900674
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/900674 | Low-profile removable ball-grid-array integrated circuit package | Jul 24, 1997 | Issued |
Array
(
[id] => 4003769
[patent_doc_number] => 05960253
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-28
[patent_title] => 'Method of manufacturing semiconductor memory device capable of readily repairing defective portion resulting from mask defect'
[patent_app_type] => 1
[patent_app_number] => 8/899814
[patent_app_country] => US
[patent_app_date] => 1997-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 2700
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/960/05960253.pdf
[firstpage_image] =>[orig_patent_app_number] => 899814
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/899814 | Method of manufacturing semiconductor memory device capable of readily repairing defective portion resulting from mask defect | Jul 23, 1997 | Issued |
Array
(
[id] => 4016107
[patent_doc_number] => 05923959
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-13
[patent_title] => 'Ball grid array (BGA) encapsulation mold'
[patent_app_type] => 1
[patent_app_number] => 8/898812
[patent_app_country] => US
[patent_app_date] => 1997-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3566
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/923/05923959.pdf
[firstpage_image] =>[orig_patent_app_number] => 898812
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/898812 | Ball grid array (BGA) encapsulation mold | Jul 22, 1997 | Issued |
Array
(
[id] => 3956896
[patent_doc_number] => 05930601
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-27
[patent_title] => 'Heat assembly and method of transferring heat'
[patent_app_type] => 1
[patent_app_number] => 8/898240
[patent_app_country] => US
[patent_app_date] => 1997-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3130
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/930/05930601.pdf
[firstpage_image] =>[orig_patent_app_number] => 898240
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/898240 | Heat assembly and method of transferring heat | Jul 21, 1997 | Issued |
Array
(
[id] => 4016008
[patent_doc_number] => 05923952
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-13
[patent_title] => 'Fusion-bond electrical feed-through'
[patent_app_type] => 1
[patent_app_number] => 8/897124
[patent_app_country] => US
[patent_app_date] => 1997-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 2
[patent_no_of_words] => 3488
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/923/05923952.pdf
[firstpage_image] =>[orig_patent_app_number] => 897124
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/897124 | Fusion-bond electrical feed-through | Jul 17, 1997 | Issued |
Array
(
[id] => 4129681
[patent_doc_number] => 06033930
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-07
[patent_title] => 'Lead frame carrying method and lead frame carrying apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/896336
[patent_app_country] => US
[patent_app_date] => 1997-07-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3853
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/033/06033930.pdf
[firstpage_image] =>[orig_patent_app_number] => 896336
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/896336 | Lead frame carrying method and lead frame carrying apparatus | Jul 16, 1997 | Issued |
Array
(
[id] => 3956773
[patent_doc_number] => 05930593
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-27
[patent_title] => 'Method for formating device on wafer without peeling'
[patent_app_type] => 1
[patent_app_number] => 8/895430
[patent_app_country] => US
[patent_app_date] => 1997-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 26
[patent_no_of_words] => 2609
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/930/05930593.pdf
[firstpage_image] =>[orig_patent_app_number] => 895430
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/895430 | Method for formating device on wafer without peeling | Jul 15, 1997 | Issued |
Array
(
[id] => 3956671
[patent_doc_number] => 05930586
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-27
[patent_title] => 'Method and apparatus for in-line measuring backside wafer-level contamination of a semiconductor wafer'
[patent_app_type] => 1
[patent_app_number] => 8/887696
[patent_app_country] => US
[patent_app_date] => 1997-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 4030
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/930/05930586.pdf
[firstpage_image] =>[orig_patent_app_number] => 887696
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/887696 | Method and apparatus for in-line measuring backside wafer-level contamination of a semiconductor wafer | Jul 2, 1997 | Issued |