Search

Frank J. Vineis

Examiner (ID: 2880, Phone: (571)270-1547 , Office: P/1786 )

Most Active Art Unit
1786
Art Unit(s)
1781, 1786
Total Applications
265
Issued Applications
95
Pending Applications
23
Abandoned Applications
150

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4039249 [patent_doc_number] => 05926731 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Method for controlling solder bump shape and stand-off height' [patent_app_type] => 1 [patent_app_number] => 8/887064 [patent_app_country] => US [patent_app_date] => 1997-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3586 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/926/05926731.pdf [firstpage_image] =>[orig_patent_app_number] => 887064 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/887064
Method for controlling solder bump shape and stand-off height Jul 1, 1997 Issued
Array ( [id] => 3990720 [patent_doc_number] => 05891756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Process for converting a wire bond pad to a flip chip solder bump pad and pad formed thereby' [patent_app_type] => 1 [patent_app_number] => 8/883694 [patent_app_country] => US [patent_app_date] => 1997-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 7 [patent_no_of_words] => 2076 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/891/05891756.pdf [firstpage_image] =>[orig_patent_app_number] => 883694 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/883694
Process for converting a wire bond pad to a flip chip solder bump pad and pad formed thereby Jun 26, 1997 Issued
Array ( [id] => 3942004 [patent_doc_number] => 05989991 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Methods for fabricating a bonding pad having improved adhesion to an underlying structure' [patent_app_type] => 1 [patent_app_number] => 8/879562 [patent_app_country] => US [patent_app_date] => 1997-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 3135 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/989/05989991.pdf [firstpage_image] =>[orig_patent_app_number] => 879562 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/879562
Methods for fabricating a bonding pad having improved adhesion to an underlying structure Jun 19, 1997 Issued
Array ( [id] => 3952640 [patent_doc_number] => 05940687 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Wire mesh insert for thermal adhesives' [patent_app_type] => 1 [patent_app_number] => 8/870800 [patent_app_country] => US [patent_app_date] => 1997-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 7 [patent_no_of_words] => 3668 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/940/05940687.pdf [firstpage_image] =>[orig_patent_app_number] => 870800 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/870800
Wire mesh insert for thermal adhesives Jun 5, 1997 Issued
Array ( [id] => 4016633 [patent_doc_number] => 05923996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Method to protect alignment mark in CMP process' [patent_app_type] => 1 [patent_app_number] => 8/867312 [patent_app_country] => US [patent_app_date] => 1997-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 4453 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923996.pdf [firstpage_image] =>[orig_patent_app_number] => 867312 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/867312
Method to protect alignment mark in CMP process Jun 1, 1997 Issued
Array ( [id] => 3941927 [patent_doc_number] => 05946554 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Method of producing resin-sealed electronic device' [patent_app_type] => 1 [patent_app_number] => 8/863398 [patent_app_country] => US [patent_app_date] => 1997-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 5757 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/946/05946554.pdf [firstpage_image] =>[orig_patent_app_number] => 863398 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/863398
Method of producing resin-sealed electronic device May 26, 1997 Issued
Array ( [id] => 4233480 [patent_doc_number] => 06074893 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Process for forming fine thick-film conductor patterns' [patent_app_type] => 1 [patent_app_number] => 8/863279 [patent_app_country] => US [patent_app_date] => 1997-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 32 [patent_no_of_words] => 22550 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/074/06074893.pdf [firstpage_image] =>[orig_patent_app_number] => 863279 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/863279
Process for forming fine thick-film conductor patterns May 26, 1997 Issued
Array ( [id] => 4070419 [patent_doc_number] => 06069027 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Fixture for lid-attachment for encapsulated packages' [patent_app_type] => 1 [patent_app_number] => 8/859751 [patent_app_country] => US [patent_app_date] => 1997-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 4908 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069027.pdf [firstpage_image] =>[orig_patent_app_number] => 859751 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/859751
Fixture for lid-attachment for encapsulated packages May 20, 1997 Issued
Array ( [id] => 4084325 [patent_doc_number] => 06025213 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Semiconductor light-emitting device package and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/856529 [patent_app_country] => US [patent_app_date] => 1997-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 41 [patent_no_of_words] => 8753 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/025/06025213.pdf [firstpage_image] =>[orig_patent_app_number] => 856529 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/856529
Semiconductor light-emitting device package and method of manufacturing the same May 13, 1997 Issued
Array ( [id] => 4181503 [patent_doc_number] => 06020252 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Method of producing a thin layer of semiconductor material' [patent_app_type] => 1 [patent_app_number] => 8/856275 [patent_app_country] => US [patent_app_date] => 1997-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3558 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/020/06020252.pdf [firstpage_image] =>[orig_patent_app_number] => 856275 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/856275
Method of producing a thin layer of semiconductor material May 13, 1997 Issued
Array ( [id] => 3980290 [patent_doc_number] => 05910011 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-08 [patent_title] => 'Method and apparatus for monitoring processes using multiple parameters of a semiconductor wafer processing system' [patent_app_type] => 1 [patent_app_number] => 8/854508 [patent_app_country] => US [patent_app_date] => 1997-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2937 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/910/05910011.pdf [firstpage_image] =>[orig_patent_app_number] => 854508 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/854508
Method and apparatus for monitoring processes using multiple parameters of a semiconductor wafer processing system May 11, 1997 Issued
Array ( [id] => 4063025 [patent_doc_number] => 05866475 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-02 [patent_title] => 'Method of forming solder bumps' [patent_app_type] => 1 [patent_app_number] => 8/851852 [patent_app_country] => US [patent_app_date] => 1997-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 3931 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/866/05866475.pdf [firstpage_image] =>[orig_patent_app_number] => 851852 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/851852
Method of forming solder bumps May 5, 1997 Issued
Array ( [id] => 4015931 [patent_doc_number] => 05923947 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Method for achieving low capacitance diffusion pattern filling' [patent_app_type] => 1 [patent_app_number] => 8/851842 [patent_app_country] => US [patent_app_date] => 1997-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 4015 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923947.pdf [firstpage_image] =>[orig_patent_app_number] => 851842 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/851842
Method for achieving low capacitance diffusion pattern filling May 5, 1997 Issued
Array ( [id] => 4197297 [patent_doc_number] => 06013536 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-11 [patent_title] => 'Apparatus for automated pillar layout and method for implementing same' [patent_app_type] => 1 [patent_app_number] => 8/838020 [patent_app_country] => US [patent_app_date] => 1997-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 8166 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/013/06013536.pdf [firstpage_image] =>[orig_patent_app_number] => 838020 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/838020
Apparatus for automated pillar layout and method for implementing same Apr 21, 1997 Issued
Array ( [id] => 3967176 [patent_doc_number] => 05956601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Method of mounting a plurality of semiconductor devices in corresponding supporters' [patent_app_type] => 1 [patent_app_number] => 8/839358 [patent_app_country] => US [patent_app_date] => 1997-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 3239 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956601.pdf [firstpage_image] =>[orig_patent_app_number] => 839358 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/839358
Method of mounting a plurality of semiconductor devices in corresponding supporters Apr 16, 1997 Issued
Array ( [id] => 4009171 [patent_doc_number] => 05920770 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Resin seal semiconductor package and manufacturing method of the same' [patent_app_type] => 1 [patent_app_number] => 8/837960 [patent_app_country] => US [patent_app_date] => 1997-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 67 [patent_figures_cnt] => 115 [patent_no_of_words] => 22791 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920770.pdf [firstpage_image] =>[orig_patent_app_number] => 837960 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/837960
Resin seal semiconductor package and manufacturing method of the same Apr 13, 1997 Issued
Array ( [id] => 4006461 [patent_doc_number] => 05888849 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Method for fabricating an electronic package' [patent_app_type] => 1 [patent_app_number] => 8/833478 [patent_app_country] => US [patent_app_date] => 1997-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 1740 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/888/05888849.pdf [firstpage_image] =>[orig_patent_app_number] => 833478 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/833478
Method for fabricating an electronic package Apr 6, 1997 Issued
Array ( [id] => 3936746 [patent_doc_number] => 05915167 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Three dimensional structure memory' [patent_app_type] => 1 [patent_app_number] => 8/835190 [patent_app_country] => US [patent_app_date] => 1997-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7183 [patent_no_of_claims] => 73 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/915/05915167.pdf [firstpage_image] =>[orig_patent_app_number] => 835190 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/835190
Three dimensional structure memory Apr 3, 1997 Issued
Array ( [id] => 4031485 [patent_doc_number] => 05907785 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Wafer with elevated contact substructures' [patent_app_type] => 1 [patent_app_number] => 8/826362 [patent_app_country] => US [patent_app_date] => 1997-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3867 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907785.pdf [firstpage_image] =>[orig_patent_app_number] => 826362 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/826362
Wafer with elevated contact substructures Mar 25, 1997 Issued
Array ( [id] => 3956883 [patent_doc_number] => 05930600 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Diode-laser module with a bonded component and method for bonding same' [patent_app_type] => 1 [patent_app_number] => 8/825006 [patent_app_country] => US [patent_app_date] => 1997-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 3092 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930600.pdf [firstpage_image] =>[orig_patent_app_number] => 825006 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/825006
Diode-laser module with a bonded component and method for bonding same Mar 25, 1997 Issued
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