Search

Frank J. Vineis

Examiner (ID: 2880, Phone: (571)270-1547 , Office: P/1786 )

Most Active Art Unit
1786
Art Unit(s)
1781, 1786
Total Applications
265
Issued Applications
95
Pending Applications
23
Abandoned Applications
150

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1446518 [patent_doc_number] => 06368888 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Soldering an optical component to a substrate' [patent_app_type] => B1 [patent_app_number] => 09/252724 [patent_app_country] => US [patent_app_date] => 1999-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1518 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/368/06368888.pdf [firstpage_image] =>[orig_patent_app_number] => 09252724 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/252724
Soldering an optical component to a substrate Feb 18, 1999 Issued
Array ( [id] => 4237614 [patent_doc_number] => 06080595 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Method for estimating the thickness of layer coated on wafer' [patent_app_type] => 1 [patent_app_number] => 9/252940 [patent_app_country] => US [patent_app_date] => 1999-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1969 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/080/06080595.pdf [firstpage_image] =>[orig_patent_app_number] => 252940 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/252940
Method for estimating the thickness of layer coated on wafer Feb 18, 1999 Issued
Array ( [id] => 4117027 [patent_doc_number] => 06071801 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Method and apparatus for the attachment of particles to a substrate' [patent_app_type] => 1 [patent_app_number] => 9/253837 [patent_app_country] => US [patent_app_date] => 1999-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4128 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/071/06071801.pdf [firstpage_image] =>[orig_patent_app_number] => 253837 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/253837
Method and apparatus for the attachment of particles to a substrate Feb 18, 1999 Issued
Array ( [id] => 4292553 [patent_doc_number] => 06268639 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Electrostatic-discharge protection circuit' [patent_app_type] => 1 [patent_app_number] => 9/248547 [patent_app_country] => US [patent_app_date] => 1999-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3708 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/268/06268639.pdf [firstpage_image] =>[orig_patent_app_number] => 248547 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/248547
Electrostatic-discharge protection circuit Feb 10, 1999 Issued
Array ( [id] => 4225038 [patent_doc_number] => 06040633 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Oxide wire bond insulation in semiconductor assemblies' [patent_app_type] => 1 [patent_app_number] => 9/249225 [patent_app_country] => US [patent_app_date] => 1999-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2331 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/040/06040633.pdf [firstpage_image] =>[orig_patent_app_number] => 249225 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/249225
Oxide wire bond insulation in semiconductor assemblies Feb 10, 1999 Issued
Array ( [id] => 4145333 [patent_doc_number] => 06063649 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Device mounting a semiconductor element on a wiring substrate and manufacturing method thereof' [patent_app_type] => 1 [patent_app_number] => 9/247617 [patent_app_country] => US [patent_app_date] => 1999-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5931 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/063/06063649.pdf [firstpage_image] =>[orig_patent_app_number] => 247617 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/247617
Device mounting a semiconductor element on a wiring substrate and manufacturing method thereof Feb 9, 1999 Issued
Array ( [id] => 4282440 [patent_doc_number] => 06281548 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Power semiconductor device using semi-insulating polycrystalline silicon' [patent_app_type] => 1 [patent_app_number] => 9/247507 [patent_app_country] => US [patent_app_date] => 1999-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5935 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281548.pdf [firstpage_image] =>[orig_patent_app_number] => 247507 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/247507
Power semiconductor device using semi-insulating polycrystalline silicon Feb 9, 1999 Issued
Array ( [id] => 4407965 [patent_doc_number] => 06309915 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Semiconductor chip package with expander ring and method of making same' [patent_app_type] => 1 [patent_app_number] => 9/245224 [patent_app_country] => US [patent_app_date] => 1999-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 9241 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/309/06309915.pdf [firstpage_image] =>[orig_patent_app_number] => 245224 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/245224
Semiconductor chip package with expander ring and method of making same Feb 4, 1999 Issued
Array ( [id] => 4130622 [patent_doc_number] => 06146922 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Hybrid frame with lead-lock tape' [patent_app_type] => 1 [patent_app_number] => 9/243887 [patent_app_country] => US [patent_app_date] => 1999-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3301 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/146/06146922.pdf [firstpage_image] =>[orig_patent_app_number] => 243887 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/243887
Hybrid frame with lead-lock tape Feb 2, 1999 Issued
Array ( [id] => 4100027 [patent_doc_number] => 06066542 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Method for the manufacture of a power semiconductor component' [patent_app_type] => 1 [patent_app_number] => 9/240837 [patent_app_country] => US [patent_app_date] => 1999-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 1145 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/066/06066542.pdf [firstpage_image] =>[orig_patent_app_number] => 240837 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/240837
Method for the manufacture of a power semiconductor component Jan 31, 1999 Issued
Array ( [id] => 4282131 [patent_doc_number] => 06281527 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Electrostatic discharge protection circuit with high trigger current' [patent_app_type] => 1 [patent_app_number] => 9/241547 [patent_app_country] => US [patent_app_date] => 1999-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2433 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281527.pdf [firstpage_image] =>[orig_patent_app_number] => 241547 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/241547
Electrostatic discharge protection circuit with high trigger current Jan 31, 1999 Issued
Array ( [id] => 4107016 [patent_doc_number] => 06057168 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Method for forming bumps using dummy wafer' [patent_app_type] => 1 [patent_app_number] => 9/237897 [patent_app_country] => US [patent_app_date] => 1999-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3770 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057168.pdf [firstpage_image] =>[orig_patent_app_number] => 237897 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/237897
Method for forming bumps using dummy wafer Jan 26, 1999 Issued
Array ( [id] => 4233554 [patent_doc_number] => 06074898 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Lead frame and integrated circuit package' [patent_app_type] => 1 [patent_app_number] => 9/237296 [patent_app_country] => US [patent_app_date] => 1999-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 5595 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/074/06074898.pdf [firstpage_image] =>[orig_patent_app_number] => 237296 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/237296
Lead frame and integrated circuit package Jan 24, 1999 Issued
Array ( [id] => 4233528 [patent_doc_number] => 06074896 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Method of processing semiconductor material wafers and method of forming flip chips and semiconductor chips' [patent_app_type] => 1 [patent_app_number] => 9/235567 [patent_app_country] => US [patent_app_date] => 1999-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 2581 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/074/06074896.pdf [firstpage_image] =>[orig_patent_app_number] => 235567 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/235567
Method of processing semiconductor material wafers and method of forming flip chips and semiconductor chips Jan 21, 1999 Issued
Array ( [id] => 4291584 [patent_doc_number] => 06180433 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Combination inductive coil and integrated circuit semiconductor chip in a single lead frame package and method therefor' [patent_app_type] => 1 [patent_app_number] => 9/231726 [patent_app_country] => US [patent_app_date] => 1999-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2211 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/180/06180433.pdf [firstpage_image] =>[orig_patent_app_number] => 231726 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/231726
Combination inductive coil and integrated circuit semiconductor chip in a single lead frame package and method therefor Jan 14, 1999 Issued
Array ( [id] => 4411053 [patent_doc_number] => 06271595 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Method for improving adhesion to copper' [patent_app_type] => 1 [patent_app_number] => 9/231618 [patent_app_country] => US [patent_app_date] => 1999-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2072 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271595.pdf [firstpage_image] =>[orig_patent_app_number] => 231618 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/231618
Method for improving adhesion to copper Jan 13, 1999 Issued
Array ( [id] => 4124566 [patent_doc_number] => 06127207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Semiconductor integrated circuit and fabrication method therefor' [patent_app_type] => 1 [patent_app_number] => 9/225504 [patent_app_country] => US [patent_app_date] => 1999-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 9004 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/127/06127207.pdf [firstpage_image] =>[orig_patent_app_number] => 225504 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/225504
Semiconductor integrated circuit and fabrication method therefor Jan 5, 1999 Issued
Array ( [id] => 4190804 [patent_doc_number] => 06043110 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Wire mesh insert for thermal adhesives' [patent_app_type] => 1 [patent_app_number] => 9/225268 [patent_app_country] => US [patent_app_date] => 1999-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 7 [patent_no_of_words] => 3668 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/043/06043110.pdf [firstpage_image] =>[orig_patent_app_number] => 225268 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/225268
Wire mesh insert for thermal adhesives Jan 4, 1999 Issued
Array ( [id] => 4358923 [patent_doc_number] => 06255217 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Plasma treatment to enhance inorganic dielectric adhesion to copper' [patent_app_type] => 1 [patent_app_number] => 9/225530 [patent_app_country] => US [patent_app_date] => 1999-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2743 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255217.pdf [firstpage_image] =>[orig_patent_app_number] => 225530 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/225530
Plasma treatment to enhance inorganic dielectric adhesion to copper Jan 3, 1999 Issued
Array ( [id] => 4380384 [patent_doc_number] => 06261854 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Interconnect with pressure sensing mechanism for testing semiconductor wafers' [patent_app_type] => 1 [patent_app_number] => 9/224924 [patent_app_country] => US [patent_app_date] => 1999-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 5801 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/261/06261854.pdf [firstpage_image] =>[orig_patent_app_number] => 224924 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224924
Interconnect with pressure sensing mechanism for testing semiconductor wafers Jan 3, 1999 Issued
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