Frank Niranjan

Array ( [id] => 3674169 [patent_doc_number] => 05668754 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Ferroelectric memory cell and reading/writing method thereof' [patent_app_type] => 1 [patent_app_number] => 8/587790 [patent_app_country] => US [patent_app_date] => 1995-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5299 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668754.pdf [firstpage_image] =>[orig_patent_app_number] => 587790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3644585 [patent_doc_number] => 05610855 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-11 [patent_title] => 'Multi-valued semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/576574 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 28 [patent_no_of_words] => 10412 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/610/05610855.pdf [firstpage_image] =>[orig_patent_app_number] => 576574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3657887 [patent_doc_number] => 05638324 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Flash memory device' [patent_app_type] => 1 [patent_app_number] => 8/576056 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2317 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/638/05638324.pdf [firstpage_image] =>[orig_patent_app_number] => 576056 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3740991 [patent_doc_number] => 05666315 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Semiconductor memory device having a redundancy function suppressible of leakage current from a defective memory cell' [patent_app_type] => 1 [patent_app_number] => 8/576351 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 6910 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666315.pdf [firstpage_image] =>[orig_patent_app_number] => 576351 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3674197 [patent_doc_number] => 05668756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Multi-value level type non-volatile semiconductor memory unit and method of rewriting the same' [patent_app_type] => 1 [patent_app_number] => 8/576086 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5730 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668756.pdf [firstpage_image] =>[orig_patent_app_number] => 576086 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3672499 [patent_doc_number] => 05625598 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-29 [patent_title] => 'Semiconductor memory device having precharge circuit' [patent_app_type] => 1 [patent_app_number] => 8/575474 [patent_app_country] => US [patent_app_date] => 1995-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 21 [patent_no_of_words] => 3324 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/625/05625598.pdf [firstpage_image] =>[orig_patent_app_number] => 575474 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3630371 [patent_doc_number] => 05615145 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Semiconductor memory with ferroelectric capacitors' [patent_app_type] => 1 [patent_app_number] => 8/580090 [patent_app_country] => US [patent_app_date] => 1995-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7118 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/615/05615145.pdf [firstpage_image] =>[orig_patent_app_number] => 580090 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3669898 [patent_doc_number] => 05648928 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-15 [patent_title] => 'Alignment structure of a main amplifier in a memory device' [patent_app_type] => 1 [patent_app_number] => 8/574490 [patent_app_country] => US [patent_app_date] => 1995-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1850 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/648/05648928.pdf [firstpage_image] =>[orig_patent_app_number] => 574490 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3739025 [patent_doc_number] => 05703810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-30 [patent_title] => 'DRAM for texture mapping' [patent_app_type] => 1 [patent_app_number] => 8/573254 [patent_app_country] => US [patent_app_date] => 1995-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2596 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/703/05703810.pdf [firstpage_image] =>[orig_patent_app_number] => 573254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3890325 [patent_doc_number] => 05729504 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Continuous burst edo memory device' [patent_app_type] => 1 [patent_app_number] => 8/572487 [patent_app_country] => US [patent_app_date] => 1995-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5546 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729504.pdf [firstpage_image] =>[orig_patent_app_number] => 572487 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3853758 [patent_doc_number] => 05745411 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/570169 [patent_app_country] => US [patent_app_date] => 1995-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3796 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745411.pdf [firstpage_image] =>[orig_patent_app_number] => 570169 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3704817 [patent_doc_number] => 05596545 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-21 [patent_title] => 'Semiconductor memory device with internal self-refreshing' [patent_app_type] => 1 [patent_app_number] => 8/566887 [patent_app_country] => US [patent_app_date] => 1995-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5547 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/596/05596545.pdf [firstpage_image] =>[orig_patent_app_number] => 566887 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3674363 [patent_doc_number] => 05668769 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Memory device performance by delayed power-down' [patent_app_type] => 1 [patent_app_number] => 8/560229 [patent_app_country] => US [patent_app_date] => 1995-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2408 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668769.pdf [firstpage_image] =>[orig_patent_app_number] => 560229 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3644572 [patent_doc_number] => 05610854 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-11 [patent_title] => 'Semiconductor memory device and fabrication process thereof' [patent_app_type] => 1 [patent_app_number] => 8/561287 [patent_app_country] => US [patent_app_date] => 1995-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 6060 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/610/05610854.pdf [firstpage_image] =>[orig_patent_app_number] => 561287 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3691338 [patent_doc_number] => 05633826 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Semiconductor memory wherein a signal selectively substitutes a redundant memory cell link for a faulty ordinary memory cell link' [patent_app_type] => 1 [patent_app_number] => 8/561261 [patent_app_country] => US [patent_app_date] => 1995-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7504 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/633/05633826.pdf [firstpage_image] =>[orig_patent_app_number] => 561261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3703626 [patent_doc_number] => 05661676 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-26 [patent_title] => 'Semiconductor memory and method of fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/560689 [patent_app_country] => US [patent_app_date] => 1995-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4283 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/661/05661676.pdf [firstpage_image] =>[orig_patent_app_number] => 560689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3712539 [patent_doc_number] => 05646887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-08 [patent_title] => 'Sense amplifier with pre-charge circuit and low-voltage operation mode' [patent_app_type] => 1 [patent_app_number] => 8/559126 [patent_app_country] => US [patent_app_date] => 1995-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1400 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/646/05646887.pdf [firstpage_image] =>[orig_patent_app_number] => 559126 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3691461 [patent_doc_number] => 05633834 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Synchronization device for output stages, particularly for electronic memories' [patent_app_type] => 1 [patent_app_number] => 8/560324 [patent_app_country] => US [patent_app_date] => 1995-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2693 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/633/05633834.pdf [firstpage_image] =>[orig_patent_app_number] => 560324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3617802 [patent_doc_number] => 05590071 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'Method and apparatus for emulating a high capacity DRAM' [patent_app_type] => 1 [patent_app_number] => 8/559321 [patent_app_country] => US [patent_app_date] => 1995-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3646 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/590/05590071.pdf [firstpage_image] =>[orig_patent_app_number] => 559321 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3732071 [patent_doc_number] => 05682354 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-28 [patent_title] => 'CAS recognition in burst extended data out DRAM' [patent_app_type] => 1 [patent_app_number] => 8/553986 [patent_app_country] => US [patent_app_date] => 1995-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3989 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/682/05682354.pdf [firstpage_image] =>[orig_patent_app_number] => 553986 [rel_patent_id] =>[rel_patent_doc_number] =>)